Mark D. Bellows

Person

Rochester, MN, US

People

Patents Grantslast 30 patents

Information Patent Grant
Delayed execution of program code on multiple processors
- Patent number 9,405,315
- Issue date Aug 2, 2016
- International Business Machines Corporation
- Mark D. Bellows
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods and systems with delayed execution of multiple processors
- Patent number 9,146,835
- Issue date Sep 29, 2015
- International Business Machines Corporation
- Mark D. Bellows
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory controller to utilize DRAM write buffers
- Patent number 8,219,745
- Issue date Jul 10, 2012
- International Business Machines Corporation
- Mark David Bellows
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Reuse of functional data buffers for pattern buffers in XDR DRAM
- Patent number 7,925,823
- Issue date Apr 12, 2011
- International Business Machines Corporation
- Mark David Bellows
- G11 - INFORMATION STORAGE
Information Patent Grant
Rank select operation between an XIO interface and a double data ra...
- Patent number 7,840,744
- Issue date Nov 23, 2010
- International Business Machines Corporation
- Mark David Bellows
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory controller operating in a system with a variable system clock
- Patent number 7,761,682
- Issue date Jul 20, 2010
- International Business Machines Corporation
- Melissa Ann Barnum
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory command and address conversion between an XDR interface and...
- Patent number 7,757,040
- Issue date Jul 13, 2010
- International Business Machines Corporation
- Mark D. Bellows
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Managing write-to-read turnarounds in an early read after write mem...
- Patent number 7,752,379
- Issue date Jul 6, 2010
- International Business Machines Corporation
- Mark David Bellows
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Optimizing data bandwidth across a variable asynchronous clock domain
- Patent number 7,669,028
- Issue date Feb 23, 2010
- International Business Machines Corporation
- Mark D. Bellows
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for scaling input bandwidth for bandwidth allo...
- Patent number 7,660,246
- Issue date Feb 9, 2010
- International Business Machines Corporation
- Mark David Bellows
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Handling of the transmit enable signal in a dynamic random access m...
- Patent number 7,631,154
- Issue date Dec 8, 2009
- International Business Machines Corporation
- Mark David Bellows
- G11 - INFORMATION STORAGE
Information Patent Grant
Deferring refreshes during calibrations in memory systems
- Patent number 7,613,873
- Issue date Nov 3, 2009
- International Business Machines Corporation
- Mark David Bellows
- G11 - INFORMATION STORAGE
Information Patent Grant
Structure of sequencers that perform initial and periodic calibrati...
- Patent number 7,558,908
- Issue date Jul 7, 2009
- International Business Machines Corporation
- Mark David Bellows
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Using constraints to simplify a memory controller
- Patent number 7,490,204
- Issue date Feb 10, 2009
- International Business Machines Corporation
- Mark David Bellows
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Managing write-to-read turnarounds in an early read after write mem...
- Patent number 7,487,318
- Issue date Feb 3, 2009
- International Business Machines Corporation
- Mark David Bellows
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory controller operating in a system with a variable system clock
- Patent number 7,467,277
- Issue date Dec 16, 2008
- International Business Machines Corporation
- Melissa Ann Barnum
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory controller capable of locating an open command cycle to issu...
- Patent number 7,380,083
- Issue date May 27, 2008
- International Business Machines Corporation
- Mark D. Bellows
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Reuse of functional data buffers for pattern buffers in XDR DRAM
- Patent number 7,380,052
- Issue date May 27, 2008
- International Business Machines Corporation
- Mark David Bellows
- G11 - INFORMATION STORAGE
Information Patent Grant
Deferring refreshes during calibrations in memory systems
- Patent number 7,356,642
- Issue date Apr 8, 2008
- International Business Machines Corporation
- Mark David Bellows
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and apparatus to avoid collisions between row activate and c...
- Patent number 7,321,961
- Issue date Jan 22, 2008
- International Business Machines Corporation
- Mark David Bellows
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for managing write-to-read turnarounds in an e...
- Patent number 7,321,950
- Issue date Jan 22, 2008
- International Business Machines Corporation
- Mark David Bellows
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Structure of sequencers that perform initial and periodic calibrati...
- Patent number 7,305,517
- Issue date Dec 4, 2007
- International Business Machines Corporation
- Mark David Bellows
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for scaling input bandwidth for bandwidth allo...
- Patent number 7,283,562
- Issue date Oct 16, 2007
- International Business Machines Corporation
- Mark David Bellows
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Handling of the transmit enable signal in a dynamic random access m...
- Patent number 7,275,137
- Issue date Sep 25, 2007
- International Business Machines Corporation
- Mark David Bellows
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and apparatus for automatic congestion avoidance for differe...
- Patent number 7,206,284
- Issue date Apr 17, 2007
- International Business Machines Corporation
- Mark David Bellows
- H04 - ELECTRIC COMMUNICATION TECHNIQUE

Patents Applicationslast 30 patents

Information Patent Application
METHODS AND SYSTEMS WITH DELAYED EXECUTION OF MULTIPLE PROCESSORS
- Publication number 20150355673
- Publication date Dec 10, 2015
- International Business Machines Corporation
- Mark D. Bellows
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
VARIABLE DEPTH INSTRUCTION FIFOS TO IMPLEMENT SIMD ARCHITECTURE
- Publication number 20140195777
- Publication date Jul 10, 2014
- International Business Machines Corporation
- Mark D. Bellows
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTIPLE PROCESSOR DELAYED EXECUTION
- Publication number 20130179720
- Publication date Jul 11, 2013
- International Business Machines Corporation
- Mark D. Bellows
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Built In Self-Test of Memory Stressor
- Publication number 20100180154
- Publication date Jul 15, 2010
- International Business Machines Corporation
- Mark D. Bellows
- G11 - INFORMATION STORAGE
Information Patent Application
Implementing Bus Interface Calibration for Enhanced Bus Interface I...
- Publication number 20090327562
- Publication date Dec 31, 2009
- International Business Machines Corporation
- Mark David Bellows
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Managing Write-to-Read Turnarounds in an Early Read After Write Mem...
- Publication number 20090119442
- Publication date May 7, 2009
- International Business Machines Corporation
- Mark David Bellows
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY CONTROLLER OPERATING IN A SYSTEM WITH A VARIABLE SYSTEM CLOCK
- Publication number 20080307184
- Publication date Dec 11, 2008
- Melissa Ann Barnum
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Enhancements to an XDR Memory Controller to Allow for Conversion to...
- Publication number 20080229007
- Publication date Sep 18, 2008
- Mark D. Bellows
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Rank Select Operation Between an XIO Interface and a Double Data Ra...
- Publication number 20080183985
- Publication date Jul 31, 2008
- Mark David Bellows
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Memory Command and Address Conversion Between an XDR Interface and...
- Publication number 20080183925
- Publication date Jul 31, 2008
- International Business Machines Corporation
- Mark D. Bellows
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Using Extreme Data Rate Memory Commands to Scrub and Refresh Double...
- Publication number 20080183916
- Publication date Jul 31, 2008
- Mark David Bellows
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Methods and Apparatus for Software Control of a Non-Functional Oper...
- Publication number 20080168262
- Publication date Jul 10, 2008
- Mark David Bellows
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Methods and Apparatus for Calibrating Heterogeneous Memory Interfaces
- Publication number 20080168298
- Publication date Jul 10, 2008
- Mark David Bellows
- G11 - INFORMATION STORAGE
Information Patent Application
Methods and Apparatus for Interfacing a Processor and a Memory
- Publication number 20080168206
- Publication date Jul 10, 2008
- Mark David Bellows
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Deferring Refreshes During Calibrations in Memory Systems
- Publication number 20080140923
- Publication date Jun 12, 2008
- Mark David Bellows
- G11 - INFORMATION STORAGE
Information Patent Application
Handling of the Transmit Enable Signal in a Dynamic Random Access M...
- Publication number 20080046620
- Publication date Feb 21, 2008
- Mark David Bellows
- G11 - INFORMATION STORAGE
Information Patent Application
Method and Apparatus for Managing Write-to-Read Turnarounds in an E...
- Publication number 20080046632
- Publication date Feb 21, 2008
- Mark David Bellows
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Reuse of Functional Data Buffers for Pattern Buffers in XDR DRAM
- Publication number 20080040534
- Publication date Feb 14, 2008
- Mark David Bellows
- G11 - INFORMATION STORAGE
Information Patent Application
Structure of Sequencers that Perform Initial and Periodic Calibrati...
- Publication number 20080016329
- Publication date Jan 17, 2008
- Mark David Bellows
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Maintenance and Calibration Operations for Memories
- Publication number 20070250283
- Publication date Oct 25, 2007
- Melissa A. Barnum
- G11 - INFORMATION STORAGE
Information Patent Application
Memory controller operating in a system with a variable system clock
- Publication number 20070183192
- Publication date Aug 9, 2007
- International Business Machines Corporation
- Melissa Ann Barnum
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND APPARATUS FOR SCALING INPUT BANDWIDTH FOR BANDWIDTH ALLO...
- Publication number 20070183327
- Publication date Aug 9, 2007
- International Business Machines Corporation
- Mark David Bellows
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Optimizing data bandwidth across a variable asynchronous clock domain
- Publication number 20070186071
- Publication date Aug 9, 2007
- International Business Machines Corporation
- Mark D. Bellows
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Memory controller capable of handling precharge-to-precharge restri...
- Publication number 20070121398
- Publication date May 31, 2007
- Mark D. Bellows
- G11 - INFORMATION STORAGE
Information Patent Application
Memory controller capable of locating an open command cycle to issu...
- Publication number 20070043920
- Publication date Feb 22, 2007
- Mark D. Bellows
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and system for using constraints to simplify a memory contro...
- Publication number 20060230200
- Publication date Oct 12, 2006
- Mark David Bellows
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and apparatus to avoid collisions between row activate and c...
- Publication number 20060184754
- Publication date Aug 17, 2006
- International Business Machines Corporation
- Mark David Bellows
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and apparatus for managing write-to-read turnarounds in an e...
- Publication number 20060174082
- Publication date Aug 3, 2006
- Mark David Bellows
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Reuse of functional data buffers for pattern buffers in XDR DRAM
- Publication number 20060129754
- Publication date Jun 15, 2006
- International Business Machines Corporation
- Mark David Bellows
- G11 - INFORMATION STORAGE
Information Patent Application
Methods and apparatus for storing a command
- Publication number 20060129764
- Publication date Jun 15, 2006
- International Business Machines Corporation
- Mark D. Bellows
- G06 - COMPUTING CALCULATING COUNTING

Mark D. Bellows

Person

Patents Grantslast 30 patents

Delayed execution of program code on multiple processors

Methods and systems with delayed execution of multiple processors

Memory controller to utilize DRAM write buffers

Reuse of functional data buffers for pattern buffers in XDR DRAM

Rank select operation between an XIO interface and a double data ra...

Memory controller operating in a system with a variable system clock

Memory command and address conversion between an XDR interface and...

Managing write-to-read turnarounds in an early read after write mem...

Optimizing data bandwidth across a variable asynchronous clock domain

Method and apparatus for scaling input bandwidth for bandwidth allo...

Handling of the transmit enable signal in a dynamic random access m...

Deferring refreshes during calibrations in memory systems

Structure of sequencers that perform initial and periodic calibrati...

Using constraints to simplify a memory controller

Managing write-to-read turnarounds in an early read after write mem...

Memory controller operating in a system with a variable system clock

Memory controller capable of locating an open command cycle to issu...

Reuse of functional data buffers for pattern buffers in XDR DRAM

Deferring refreshes during calibrations in memory systems

Method and apparatus to avoid collisions between row activate and c...

Method and apparatus for managing write-to-read turnarounds in an e...

Structure of sequencers that perform initial and periodic calibrati...

Method and apparatus for scaling input bandwidth for bandwidth allo...

Handling of the transmit enable signal in a dynamic random access m...

Method and apparatus for automatic congestion avoidance for differe...

Patents Applicationslast 30 patents

METHODS AND SYSTEMS WITH DELAYED EXECUTION OF MULTIPLE PROCESSORS

VARIABLE DEPTH INSTRUCTION FIFOS TO IMPLEMENT SIMD ARCHITECTURE

MULTIPLE PROCESSOR DELAYED EXECUTION

Built In Self-Test of Memory Stressor

Implementing Bus Interface Calibration for Enhanced Bus Interface I...

Managing Write-to-Read Turnarounds in an Early Read After Write Mem...

MEMORY CONTROLLER OPERATING IN A SYSTEM WITH A VARIABLE SYSTEM CLOCK

Enhancements to an XDR Memory Controller to Allow for Conversion to...

Rank Select Operation Between an XIO Interface and a Double Data Ra...

Memory Command and Address Conversion Between an XDR Interface and...

Using Extreme Data Rate Memory Commands to Scrub and Refresh Double...

Methods and Apparatus for Software Control of a Non-Functional Oper...

Methods and Apparatus for Calibrating Heterogeneous Memory Interfaces

Methods and Apparatus for Interfacing a Processor and a Memory

Deferring Refreshes During Calibrations in Memory Systems

Handling of the Transmit Enable Signal in a Dynamic Random Access M...

Method and Apparatus for Managing Write-to-Read Turnarounds in an E...

Reuse of Functional Data Buffers for Pattern Buffers in XDR DRAM

Structure of Sequencers that Perform Initial and Periodic Calibrati...

Maintenance and Calibration Operations for Memories

Memory controller operating in a system with a variable system clock

METHOD AND APPARATUS FOR SCALING INPUT BANDWIDTH FOR BANDWIDTH ALLO...

Optimizing data bandwidth across a variable asynchronous clock domain

Memory controller capable of handling precharge-to-precharge restri...

Memory controller capable of locating an open command cycle to issu...

Method and system for using constraints to simplify a memory contro...

Method and apparatus to avoid collisions between row activate and c...

Method and apparatus for managing write-to-read turnarounds in an e...

Reuse of functional data buffers for pattern buffers in XDR DRAM

Methods and apparatus for storing a command