Mark Durcan

Person

Boise, ID, US

People

Patents Grantslast 30 patents

Information Patent Grant
Retrograde well structure for a CMOS imager
- Patent number 7,619,672
- Issue date Nov 17, 2009
- Aptina Imaging Corporation
- Howard E. Rhodes
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Trench buried bit line memory devices and methods thereof
- Patent number 7,365,384
- Issue date Apr 29, 2008
- Micron Technology, Inc.
- Luan C. Tran
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Trench buried bit line memory devices and methods thereof
- Patent number 7,170,124
- Issue date Jan 30, 2007
- Micron Technology, Inc.
- Luan C. Tran
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods of forming capacitors, methods of forming capacitor-over-bi...
- Patent number 6,995,059
- Issue date Feb 7, 2006
- Micron Technology, Inc.
- Tyler A. Lowrey
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Retrograde well structure for a CMOS imager
- Patent number 6,858,460
- Issue date Feb 22, 2005
- Micron Technology, Inc.
- Howard E. Rhodes
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Trench buried bit line memory devices and methods thereof
- Patent number 6,806,137
- Issue date Oct 19, 2004
- Micron Technology, Inc.
- Luan C. Tran
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Retrograde well structure for a CMOS imager
- Patent number 6,787,819
- Issue date Sep 7, 2004
- Micron Technology, Inc.
- Howard E. Rhodes
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Planarization process for semiconductor substrates
- Patent number 6,743,724
- Issue date Jun 1, 2004
- Micron Technology, Inc.
- Trung T. Doan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Trench buried bit line memory devices
- Patent number 6,734,482
- Issue date May 11, 2004
- Micron Technology, Inc.
- Luan C. Tran
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Retrograde well structure for a CMOS imager
- Patent number 6,686,220
- Issue date Feb 3, 2004
- Micron Technology, Inc.
- Howard E. Rhodes
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods of forming capacitors, and methods of forming capacitor-ove...
- Patent number 6,599,800
- Issue date Jul 29, 2003
- Micron Technology, Inc.
- Tyler A. Lowrey
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Retrograde well structure for a CMOS imager
- Patent number 6,483,129
- Issue date Nov 19, 2002
- Micron Technology, Inc.
- Howard E. Rhodes
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Retrograde well structure for a CMOS imager
- Patent number 6,445,014
- Issue date Sep 3, 2002
- Micron Technology Inc.
- Howard E. Rhodes
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor processing method using high pressure liquid media tr...
- Patent number 6,417,102
- Issue date Jul 9, 2002
- Micron Technology, Inc.
- David A. Cathey
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of forming a circuitry isolation region within a semiconduct...
- Patent number 6,340,624
- Issue date Jan 22, 2002
- Micron Technology, Inc.
- Trung Tri Doan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor processing method using high pressure liquid media tr...
- Patent number 6,333,264
- Issue date Dec 25, 2001
- Micron Technology, Inc.
- David A. Cathey
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Planarization process for semiconductor substrates
- Patent number 6,331,488
- Issue date Dec 18, 2001
- Micron Technology, Inc.
- Trung T. Doan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Retrograde well structure for a CMOS imager
- Patent number 6,310,366
- Issue date Oct 30, 2001
- Micron Technology, Inc.
- Howard E. Rhodes
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Single deposition layer metal dynamic random access memory
- Patent number 6,274,928
- Issue date Aug 14, 2001
- Micron Technology, Inc.
- Stephen L. Casper
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of forming a circuitry isolation region within a semiconduct...
- Patent number 6,100,162
- Issue date Aug 8, 2000
- Micron Technology, Inc.
- Trung Tri Doan
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
Trench buried bit line memory devices and methods thereof
- Publication number 20070040200
- Publication date Feb 22, 2007
- Luan C. Tran
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Planarization process for semiconductor substrates
- Publication number 20060249723
- Publication date Nov 9, 2006
- Trung T. Doan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Trench buried bit line memory devices and methods thereof
- Publication number 20050078534
- Publication date Apr 14, 2005
- Luan C. Tran
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Planarization process for semiconductor substrates
- Publication number 20040209475
- Publication date Oct 21, 2004
- Trung T. Doan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Retrograde well structure for a CMOS imager
- Publication number 20040150736
- Publication date Aug 5, 2004
- Howard E. Rhodes
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Trench buried bit line memory devices and methods thereof
- Publication number 20040094789
- Publication date May 20, 2004
- Luan C. Tran
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Retrograde well structure for a CMOS imager
- Publication number 20030180982
- Publication date Sep 25, 2003
- Howard E. Rhodes
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Retrograde well structure for a CMOS imager
- Publication number 20030173572
- Publication date Sep 18, 2003
- Howard E. Rhodes
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Retrograde well structure for a CMOS imager
- Publication number 20020163020
- Publication date Nov 7, 2002
- Howard E. Rhodes
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR PROCESSING METHOD USING HIGH PRESSURE LIQUID MEDIA TR...
- Publication number 20020001947
- Publication date Jan 3, 2002
- DAVID A. CATHEY
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Retrograde well structure for a CMOS imager
- Publication number 20010050382
- Publication date Dec 13, 2001
- Howard E. Rhodes
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Planarization process for semiconductor substrates
- Publication number 20010051430
- Publication date Dec 13, 2001
- Trung T. Doan
- H01 - BASIC ELECTRIC ELEMENTS

Mark Durcan

Person

Patents Grantslast 30 patents

Retrograde well structure for a CMOS imager

Trench buried bit line memory devices and methods thereof

Trench buried bit line memory devices and methods thereof

Methods of forming capacitors, methods of forming capacitor-over-bi...

Retrograde well structure for a CMOS imager

Trench buried bit line memory devices and methods thereof

Retrograde well structure for a CMOS imager

Planarization process for semiconductor substrates

Trench buried bit line memory devices

Retrograde well structure for a CMOS imager

Methods of forming capacitors, and methods of forming capacitor-ove...

Retrograde well structure for a CMOS imager

Retrograde well structure for a CMOS imager

Semiconductor processing method using high pressure liquid media tr...

Method of forming a circuitry isolation region within a semiconduct...

Semiconductor processing method using high pressure liquid media tr...

Planarization process for semiconductor substrates

Retrograde well structure for a CMOS imager

Single deposition layer metal dynamic random access memory

Method of forming a circuitry isolation region within a semiconduct...

Patents Applicationslast 30 patents

Trench buried bit line memory devices and methods thereof

Planarization process for semiconductor substrates

Trench buried bit line memory devices and methods thereof

Planarization process for semiconductor substrates

Retrograde well structure for a CMOS imager

Trench buried bit line memory devices and methods thereof

Retrograde well structure for a CMOS imager

Retrograde well structure for a CMOS imager

Retrograde well structure for a CMOS imager

SEMICONDUCTOR PROCESSING METHOD USING HIGH PRESSURE LIQUID MEDIA TR...

Retrograde well structure for a CMOS imager

Planarization process for semiconductor substrates