Mark F. Sylvester

Person

Landenberg, PA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Interconnect module with reduced power distribution impedance
- Patent number 6,847,527
- Issue date Jan 25, 2005
- 3M Innovative Properties Company
- Mark F. Sylvester
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Dimensionally stable core for use in high density chip packages and...
- Patent number 6,344,371
- Issue date Feb 5, 2002
- W. L. Gore & Associates, Inc.
- Paul J. Fischer
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Substrate with die area having same CTE as IC
- Patent number 6,248,959
- Issue date Jun 19, 2001
- W. L. Gore & Associates, Inc.
- Mark F. Sylvester
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Constraining ring for use in electronic packaging
- Patent number 6,184,589
- Issue date Feb 6, 2001
- John J. Budnaitis
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for minimizing warp in the production of electronic assemblies
- Patent number 6,183,592
- Issue date Feb 6, 2001
- Mark F. Sylvester
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of increasing package reliability by designing in plane CTE...
- Patent number 6,127,250
- Issue date Oct 3, 2000
- W. L. Gore & Associates, Inc.
- Mark F. Sylvester
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for minimizing warp and die stress in the production of an e...
- Patent number 6,027,590
- Issue date Feb 22, 2000
- W. L. Gore & Associates, Inc.
- Mark F. Sylvester
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for assembling an integrated circuit chip package having an...
- Patent number 6,015,722
- Issue date Jan 18, 2000
- Gore Enterprise Holdings, Inc.
- Donald R. Banks
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Chip package mounting structure for controlling warp of electronic...
- Patent number 6,014,317
- Issue date Jan 11, 2000
- W. L. Gore & Associates, Inc.
- Mark F. Sylvester
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Constraining ring for use in electronic packaging
- Patent number 6,011,697
- Issue date Jan 4, 2000
- W. L. Gore & Associates, Inc.
- John J. Budnaitis
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of making a lid for a chip/package system
- Patent number 5,983,974
- Issue date Nov 16, 1999
- W. L. Gore & Associates, Inc.
- Mark F. Sylvester
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for assembling an integrated circuit chip package having at...
- Patent number 5,970,319
- Issue date Oct 19, 1999
- Gore Enterprise Holdings, Inc.
- Donald R. Banks
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for assembling an integrated circuit chip package having at...
- Patent number 5,919,329
- Issue date Jul 6, 1999
- Gore Enterprise Holdings, Inc.
- Donald R. Banks
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit chip package assembly
- Patent number 5,900,312
- Issue date May 4, 1999
- W. L. Gore & Associates, Inc.
- Mark F. Sylvester
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Apparatus and method for unit area composition control to minimize...
- Patent number 5,888,630
- Issue date Mar 30, 1999
- W. L. Gore & Associates, Inc.
- Mark F. Sylvester
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for minimizing warp in the production of electronic assemblies
- Patent number 5,888,631
- Issue date Mar 30, 1999
- W. L. Gore & Associates, Inc.
- Mark F. Sylvester
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Constraining ring for use in electronic packaging
- Patent number 5,879,786
- Issue date Mar 9, 1999
- W. L. Gore & Associates, Inc.
- John J. Budnaitis
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for minimizing warp and die stress in the production of an e...
- Patent number 5,868,887
- Issue date Feb 9, 1999
- W. L. Gore & Associates, Inc.
- Mark F. Sylvester
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Dimensionally stable core for use in high density chip packages
- Patent number 5,847,327
- Issue date Dec 8, 1998
- W. L. Gore & Associates, Inc.
- Paul J. Fischer
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of increasing package reliability using package lids with pl...
- Patent number 5,838,063
- Issue date Nov 17, 1998
- W. L. Gore & Associates
- Mark F. Sylvester
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for controlling warp of electronic assemblies by use of pack...
- Patent number 5,778,523
- Issue date Jul 14, 1998
- W. L. Gore & Associates, Inc.
- Mark F. Sylvester
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
Interconnect module with reduced power distribution impedance
- Publication number 20040170006
- Publication date Sep 2, 2004
- Mark F. Sylvester
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
Crack resistant interconnect module
- Publication number 20040104463
- Publication date Jun 3, 2004
- Robin E. Gorrell
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Crack resistant interconnect module
- Publication number 20040099958
- Publication date May 27, 2004
- William R. Schildgen
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
Interconnect module with reduced power distribution impedance
- Publication number 20040012938
- Publication date Jan 22, 2004
- Mark F. Sylvester
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
DIMENSIONALLY STABLE CORE FOR USE IN HIGH DENSITY CHIP PACKAGES AND...
- Publication number 20010029065
- Publication date Oct 11, 2001
- PAUL J. FISCHER
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method of increasing package reliability using package lids with pl...
- Publication number 20010023533
- Publication date Sep 27, 2001
- Mark F. Sylvester
- H01 - BASIC ELECTRIC ELEMENTS

Mark F. Sylvester

Person

Patents Grantslast 30 patents

Interconnect module with reduced power distribution impedance

Dimensionally stable core for use in high density chip packages and...

Substrate with die area having same CTE as IC

Constraining ring for use in electronic packaging

Method for minimizing warp in the production of electronic assemblies

Method of increasing package reliability by designing in plane CTE...

Method for minimizing warp and die stress in the production of an e...

Method for assembling an integrated circuit chip package having an...

Chip package mounting structure for controlling warp of electronic...

Constraining ring for use in electronic packaging

Method of making a lid for a chip/package system

Method for assembling an integrated circuit chip package having at...

Method for assembling an integrated circuit chip package having at...

Integrated circuit chip package assembly

Apparatus and method for unit area composition control to minimize...

Method for minimizing warp in the production of electronic assemblies

Constraining ring for use in electronic packaging

Method for minimizing warp and die stress in the production of an e...

Dimensionally stable core for use in high density chip packages

Method of increasing package reliability using package lids with pl...

Method for controlling warp of electronic assemblies by use of pack...

Patents Applicationslast 30 patents

Interconnect module with reduced power distribution impedance

Crack resistant interconnect module

Crack resistant interconnect module

Interconnect module with reduced power distribution impedance

DIMENSIONALLY STABLE CORE FOR USE IN HIGH DENSITY CHIP PACKAGES AND...

Method of increasing package reliability using package lids with pl...