Mark G. Marshall

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Essex Junction, VT, US

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Patents Grantslast 30 patents

Information Patent Grant
Wiring layout design method and system for integrated circuits
- Patent number 5,341,310
- Issue date Aug 23, 1994
- International Business Machines Corporation
- Scott W. Gould
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Current limiting clamp circuit
- Patent number 5,182,468
- Issue date Jan 26, 1993
- IBM Corporation
- Charles K. Erdelyi
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Data dependent variable time delay circuit
- Patent number 5,059,837
- Issue date Oct 22, 1991
- IBM
- Charles K. Erdelyi
- H03 - BASIC ELECTRONIC CIRCUITRY