Masaharu Aoyama

Person

Fujisawa, JP

People

Patents Grantslast 30 patents

Information Patent Grant
Method of forming trench buried wiring for semiconductor device
- Patent number 5,266,526
- Issue date Nov 30, 1993
- Kabushiki Kaisha Toshiba
- Masaharu Aoyama
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of controlling metal thin film formation conditions
- Patent number 5,175,115
- Issue date Dec 29, 1992
- Kabushiki Kaisha Toshiba
- Masahiro Abe
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device having insulating layer including polyimide film
- Patent number 4,853,760
- Issue date Aug 1, 1989
- Tokyo Shibaura Denki Kabushiki Kaisha
- Masahiro Abe
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of gettering a semiconductor device and forming an isolation...
- Patent number 4,766,086
- Issue date Aug 23, 1988
- Kabushiki Kaisha Toshiba
- Jiro Ohshima
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of making multilayered interconnects using hillock studs for...
- Patent number 4,728,627
- Issue date Mar 1, 1988
- Kabushiki Kaisha Toshiba
- Yasukazu Mase
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of manufacturing a semiconductor device with conductive tren...
- Patent number 4,717,682
- Issue date Jan 5, 1988
- Kabushiki Kaisha Toshiba
- Shin-ichi Taka
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device with an improved bonding section
- Patent number 4,636,832
- Issue date Jan 13, 1987
- Tokyo Shibaura Denki Kabushiki Kaisha
- Masahiro Abe
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for planarizing the surface of an interlayer insulating film...
- Patent number 4,634,496
- Issue date Jan 6, 1987
- Kabushiki Kaisha Toshiba
- Yasukazu Mase
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device having a multilayer wiring structure using a p...
- Patent number 4,618,878
- Issue date Oct 21, 1986
- Kabushiki Kaisha Toshiba
- Masaharu Aoyama
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device of multilayer wiring structure
- Patent number 4,613,888
- Issue date Sep 23, 1986
- Kabushiki Kaisha Toshiba
- Yasukazu Mase
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device
- Patent number 4,561,009
- Issue date Dec 24, 1985
- Tokyo Shibaura Denki Kabushiki Kaisha
- Toshio Yonezawa
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for forming metallization structure having flat surface on s...
- Patent number 4,520,041
- Issue date May 28, 1985
- Tokyo Shibaura Denki Kabushiki Kaisha
- Masaharu Aoyama
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor memory device
- Patent number 4,507,673
- Issue date Mar 26, 1985
- Tokyo Shibaura Denki Kabushiki Kaisha
- Masaharu Aoyama
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
System for etching a metal film on a semiconductor wafer
- Patent number 4,462,856
- Issue date Jul 31, 1984
- Tokyo Shibaura Denki Kabushiki Kaisha
- Masahiro Abe
- C23 - COATING METALLIC MATERIAL COATING MATERIAL WITH METALLIC MATERIAL CHEMI...
Information Patent Grant
Semiconductor device and a method for manufacturing the same
- Patent number 4,433,004
- Issue date Feb 21, 1984
- Tokyo Shibaura Denki Kabushiki Kaisha
- Toshio Yonezawa
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of manufacturing a semiconductor device
- Patent number 4,403,392
- Issue date Sep 13, 1983
- Tokyo Shibaura Denki Kabushiki Kaisha
- Jiro Oshima
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of producing semiconductor device
- Patent number 4,334,349
- Issue date Jun 15, 1982
- Tokyo Shibaura Denki Kabushiki Kaisha
- Masaharu Aoyama
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Fluorine-doped P type silicon
- Patent number 4,240,096
- Issue date Dec 16, 1980
- Tokyo Shibaura Denki Kabushiki Kaisha
- Shunichi Hiraki
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device with multi-layered metalizations
- Patent number 4,200,969
- Issue date May 6, 1980
- Tokyo Shibaura Electric Co., Ltd.
- Masaharu Aoyama
- H01 - BASIC ELECTRIC ELEMENTS

Masaharu Aoyama

Person

Patents Grantslast 30 patents

Method of forming trench buried wiring for semiconductor device

Method of controlling metal thin film formation conditions

Semiconductor device having insulating layer including polyimide film

Method of gettering a semiconductor device and forming an isolation...

Method of making multilayered interconnects using hillock studs for...

Method of manufacturing a semiconductor device with conductive tren...

Semiconductor device with an improved bonding section

Method for planarizing the surface of an interlayer insulating film...

Semiconductor device having a multilayer wiring structure using a p...

Semiconductor device of multilayer wiring structure

Semiconductor device

Method for forming metallization structure having flat surface on s...

Semiconductor memory device

System for etching a metal film on a semiconductor wafer

Semiconductor device and a method for manufacturing the same

Method of manufacturing a semiconductor device

Method of producing semiconductor device

Fluorine-doped P type silicon

Semiconductor device with multi-layered metalizations