Masamichi Ishihara

Person

Tokyo, JP

People

Patents Grantslast 30 patents

Information Patent Grant
Sealed stacked arrangement of semiconductor devices
- Patent number RE37539
- Issue date Feb 5, 2002
- Hitachi, Ltd.
- Satoshi Oguchi
- 257 - Active solid-state devices
Information Patent Grant
Dynamic type semiconductor memory device
- Patent number 6,108,264
- Issue date Aug 22, 2000
- Hitachi, Ltd.
- Yasushi Takahashi
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor integrated circuit device, and process and apparatus...
- Patent number 5,910,010
- Issue date Jun 8, 1999
- Hitachi, Ltd.
- Hirotaka Nishizawa
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device with lead structure on principal surface of chip
- Patent number 5,869,888
- Issue date Feb 9, 1999
- Hitachi, Ltd.
- Kunihiro Tsubosaki
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor memory having both a refresh operation cycle and a no...
- Patent number 5,862,095
- Issue date Jan 19, 1999
- Hitachi, Ltd.
- Yasushi Takahashi
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor memory device with improved substrate arrangement to...
- Patent number 5,805,513
- Issue date Sep 8, 1998
- Hitachi, Ltd.
- Yasushi Takahashi
- G11 - INFORMATION STORAGE
Information Patent Grant
Method of making mask pattern data and process for manufacturing th...
- Patent number 5,736,277
- Issue date Apr 7, 1998
- Hitachi, Ltd.
- Toshitsugu Takekuma
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Grant
Semiconductor memory having a refresh operation cycle and operating...
- Patent number 5,719,815
- Issue date Feb 17, 1998
- Hitachi, Ltd.
- Yasushi Takahashi
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor device
- Patent number 5,714,405
- Issue date Feb 3, 1998
- Hitachi, Ltd.
- Kunihiro Tsubosaki
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Sealed stacked arrangement of semiconductor devices
- Patent number 5,701,031
- Issue date Dec 23, 1997
- Hitachi, Ltd.
- Satoshi Oguchi
- G11 - INFORMATION STORAGE
Information Patent Grant
Method of fabrication of semiconductor integrated circuit device
- Patent number 5,610,089
- Issue date Mar 11, 1997
- Hitachi, Ltd.
- Hidetoshi Iwai
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device with lead structure within the planar area of...
- Patent number 5,583,375
- Issue date Dec 10, 1996
- Hitachi, Ltd.
- Kunihiro Tsubosaki
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of making mask pattern data and process for manufacturing th...
- Patent number 5,565,285
- Issue date Oct 15, 1996
- Hitachi, Ltd.
- Toshitsugu Takekuma
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Grant
Semiconductor integrated circuit device having output and internal...
- Patent number 5,534,723
- Issue date Jul 9, 1996
- Hitachi, Ltd.
- Hidetoshi Iwai
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor integrated device and wiring correction arrangement t...
- Patent number 5,483,490
- Issue date Jan 9, 1996
- Hitachi, Ltd.
- Hidetoshi Iwai
- G11 - INFORMATION STORAGE
Information Patent Grant
Method of making mask pattern data and process for manufacturing th...
- Patent number 5,458,998
- Issue date Oct 17, 1995
- Hitachi, Ltd.
- Toshitsugu Takekuma
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Grant
Semiconductor integrated circuit device having a first MISFET of an...
- Patent number 5,436,483
- Issue date Jul 25, 1995
- Hitachi, Ltd.
- Hidetoshi Iwai
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor integrated circuit device having input protective ele...
- Patent number 5,436,484
- Issue date Jul 25, 1995
- Hitachi, Ltd.
- Hidetoshi Iwai
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor memory device with improved substrate arrangement to...
- Patent number 5,426,613
- Issue date Jun 20, 1995
- Hitachi, Ltd.
- Yasushi Takahashi
- G11 - INFORMATION STORAGE
Information Patent Grant
Special mode control method for dynamic random access memory
- Patent number 5,410,507
- Issue date Apr 25, 1995
- Hitachi, Ltd.
- Masanori Tazunoki
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor memory device
- Patent number 5,359,561
- Issue date Oct 25, 1994
- Hitachi, Ltd.
- Shigetoshi Sakomura
- G11 - INFORMATION STORAGE
Information Patent Grant
Multi-chip semiconductor package
- Patent number 5,332,922
- Issue date Jul 26, 1994
- Hitachi, Ltd.
- Satoshi Oguchi
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor integrated device and wiring correction arrangement t...
- Patent number 5,289,416
- Issue date Feb 22, 1994
- Hitachi, Ltd.
- Hidetoshi Iwai
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor integrated circuit device having protective/output el...
- Patent number 5,276,346
- Issue date Jan 4, 1994
- Hitachi, Ltd.
- Hidetoshi Iwai
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor memory device with improved substrate arrangement to...
- Patent number 5,217,917
- Issue date Jun 8, 1993
- Hitachi, Ltd.
- Yasushi Takahashi
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor integrated circuit device having a plurality of memor...
- Patent number 5,208,782
- Issue date May 4, 1993
- Hitachi, Ltd.
- Toshiyuki Sakuta
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Semiconductor integrated circuit device
- Patent number 5,151,772
- Issue date Sep 29, 1992
- Hitachi, Ltd.
- Yasushi Takahashi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor memory device with low-house pads for electron beam test
- Patent number 5,021,998
- Issue date Jun 4, 1991
- Hitachi, Ltd.
- Yukihide Suzuki
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Memory including address registers for increasing access speed to t...
- Patent number 5,018,109
- Issue date May 21, 1991
- Hitachi, Ltd.
- Takashi Shinoda
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor memory device
- Patent number 4,991,139
- Issue date Feb 5, 1991
- Hitachi, Ltd.
- Yasushi Takahashi
- G11 - INFORMATION STORAGE

Masamichi Ishihara

Person

Patents Grantslast 30 patents

Sealed stacked arrangement of semiconductor devices

Dynamic type semiconductor memory device

Semiconductor integrated circuit device, and process and apparatus...

Semiconductor device with lead structure on principal surface of chip

Semiconductor memory having both a refresh operation cycle and a no...

Semiconductor memory device with improved substrate arrangement to...

Method of making mask pattern data and process for manufacturing th...

Semiconductor memory having a refresh operation cycle and operating...

Semiconductor device

Sealed stacked arrangement of semiconductor devices

Method of fabrication of semiconductor integrated circuit device

Semiconductor device with lead structure within the planar area of...

Method of making mask pattern data and process for manufacturing th...

Semiconductor integrated circuit device having output and internal...

Semiconductor integrated device and wiring correction arrangement t...

Method of making mask pattern data and process for manufacturing th...

Semiconductor integrated circuit device having a first MISFET of an...

Semiconductor integrated circuit device having input protective ele...

Semiconductor memory device with improved substrate arrangement to...

Special mode control method for dynamic random access memory

Semiconductor memory device

Multi-chip semiconductor package

Semiconductor integrated device and wiring correction arrangement t...

Semiconductor integrated circuit device having protective/output el...

Semiconductor memory device with improved substrate arrangement to...

Semiconductor integrated circuit device having a plurality of memor...

Semiconductor integrated circuit device

Semiconductor memory device with low-house pads for electron beam test

Memory including address registers for increasing access speed to t...

Semiconductor memory device