Masao Taguchi

Person

Kawasaki, JP

People

Patents Grantslast 30 patents

Information Patent Grant
Semiconductor device with circuitry for efficient information exchange
- Patent number 7,782,682
- Issue date Aug 24, 2010
- Fujitsu Semiconductor Limited
- Yasurou Matsuzaki
- G11 - INFORMATION STORAGE
Information Patent Grant
Direct tunneling memory with separated transistor and tunnel areas
- Patent number 7,462,539
- Issue date Dec 9, 2008
- Fujitsu Limited
- Kouji Tsunoda
- G11 - INFORMATION STORAGE
Information Patent Grant
Direct tunneling memory with separated transistor and tunnel areas
- Patent number 7,288,811
- Issue date Oct 30, 2007
- Fujitsu Limited
- Kouji Tsunoda
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor integrated circuit with input/output interface adapte...
- Patent number 6,744,300
- Issue date Jun 1, 2004
- Fujitsu Limited
- Masao Taguchi
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Semiconductor integrated circuit with input/output interface adapte...
- Patent number 6,737,893
- Issue date May 18, 2004
- Fujitsu Limited
- Masao Taguchi
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Semiconductor memory device having an SRAM and a DRAM on a single chip
- Patent number 6,735,141
- Issue date May 11, 2004
- Fujitsu Limited
- Hitoshi Ikeda
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor memory device and electronic apparatus
- Patent number 6,724,675
- Issue date Apr 20, 2004
- Fujitsu Limited
- Akihiro Funyu
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor integrated circuit with input/output interface adapte...
- Patent number 6,720,804
- Issue date Apr 13, 2004
- Fujitsu Limited
- Masao Taguchi
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Semiconductor integrated circuit with input/output interface adapte...
- Patent number 6,707,325
- Issue date Mar 16, 2004
- Fujitsu Limited
- Masao Taguchi
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Semiconductor memory device having a refresh operation
- Patent number 6,535,950
- Issue date Mar 18, 2003
- Fujitsu Limited
- Akihiro Funyu
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor device and multichip module
- Patent number 6,519,171
- Issue date Feb 11, 2003
- Fujitsu Limited
- Yasurou Matsuzaki
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor memory device for operating in synchronization with e...
- Patent number 6,510,095
- Issue date Jan 21, 2003
- Fujitsu Limited
- Yasurou Matsuzaki
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor device using complementary clock and signal input sta...
- Patent number 6,509,763
- Issue date Jan 21, 2003
- Fujitsu Limited
- Masao Taguchi
- G11 - INFORMATION STORAGE
Information Patent Grant
Input/output data synchronizing device
- Patent number 6,498,524
- Issue date Dec 24, 2002
- Fujitsu Limited
- Kenichi Kawasaki
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Semiconductor integrated circuit with input/output interface adapte...
- Patent number 6,492,846
- Issue date Dec 10, 2002
- Fujitsu Limited
- Masao Taguchi
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Bus configuration and input/output buffer
- Patent number 6,480,030
- Issue date Nov 12, 2002
- Fujitsu Limited
- Masao Taguchi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Semiconductor memory device
- Patent number 6,459,641
- Issue date Oct 1, 2002
- Fujitsu Limited
- Shinya Fujioka
- G11 - INFORMATION STORAGE
Information Patent Grant
Dynamic memory circuit with automatic refresh function
- Patent number 6,438,055
- Issue date Aug 20, 2002
- Fujitsu Limited
- Masao Taguchi
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor device using complementary clock and signal input sta...
- Patent number 6,424,199
- Issue date Jul 23, 2002
- Fujitsu Limited
- Masao Taguchi
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory subsystem operated in synchronism with a clock
- Patent number 6,397,312
- Issue date May 28, 2002
- Fujitsu Limited
- Masao Nakano
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Electronic circuit apparatus for transmitting signals through a bus...
- Patent number 6,384,671
- Issue date May 7, 2002
- Fujitsu Limited
- Masao Taguchi
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Variable delay circuit and semiconductor integrated circuit device
- Patent number 6,377,101
- Issue date Apr 23, 2002
- Fujitsu Limited
- Satoshi Eto
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Signal transmission with reduced ringing of signals
- Patent number 6,344,765
- Issue date Feb 5, 2002
- Fujitsu Limited
- Masao Taguchi
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Semiconductor device using complementary clock and signal input sta...
- Patent number 6,333,660
- Issue date Dec 25, 2001
- Fujitsu Limited
- Masao Taguchi
- G11 - INFORMATION STORAGE
Information Patent Grant
Reference voltage generation circuit using source followers
- Patent number 6,329,871
- Issue date Dec 11, 2001
- Fujitsu Limited
- Masao Taguchi
- G05 - CONTROLLING REGULATING
Information Patent Grant
Semiconductor device, semiconductor system, and digital delay circuit
- Patent number 6,298,004
- Issue date Oct 2, 2001
- Fujitsu Limited
- Kenichi Kawasaki
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Semiconductor memory device having an SRAM and a DRAM on a single chip
- Patent number 6,292,426
- Issue date Sep 18, 2001
- Fujitsu Limited
- Hitoshi Ikeda
- G11 - INFORMATION STORAGE
Information Patent Grant
LSI device with memory and logics mounted thereon
- Patent number 6,272,069
- Issue date Aug 7, 2001
- Fujitsu Limited
- Hiroyoshi Tomita
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor memory device
- Patent number 6,246,620
- Issue date Jun 12, 2001
- Fujitsu Limited
- Shinya Fujioka
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor device using complementary clock and signal input sta...
- Patent number 6,225,841
- Issue date May 1, 2001
- Fujitsu Limited
- Masao Taguchi
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
Memory cell array with low resistance common source and high curren...
- Publication number 20080298115
- Publication date Dec 4, 2008
- Masao Taguchi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Direct tunneling memory with separated transistor and tunnel areas
- Publication number 20080014701
- Publication date Jan 17, 2008
- FUJITSU LIMITED
- Kouji Tsunoda
- G11 - INFORMATION STORAGE
Information Patent Application
Semiconductor device, semiconductor system, and digital delay circuit
- Publication number 20050242864
- Publication date Nov 3, 2005
- FUJITSU LIMITED
- Kenichi Kawasaki
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Direct tunneling memory with separated transistor and tunnel areas
- Publication number 20050230741
- Publication date Oct 20, 2005
- FUJITSU LIMITED
- Kouji Tsunoda
- G11 - INFORMATION STORAGE
Information Patent Application
Semiconductor memory device and electronic apparatus
- Publication number 20030115405
- Publication date Jun 19, 2003
- FUJITSU LIMITED
- Akihiro Funyu
- G11 - INFORMATION STORAGE
Information Patent Application
Semiconductor integrated circuit with input/output interface adapte...
- Publication number 20030071663
- Publication date Apr 17, 2003
- FUJITSU LIMITED
- Masao Taguchi
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Semiconductor integrated circuit with input/output interface adapte...
- Publication number 20030058007
- Publication date Mar 27, 2003
- FUJITSU LIMITED
- Masao Taguchi
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Semiconductor integrated circuit with input/output interface adapte...
- Publication number 20030058008
- Publication date Mar 27, 2003
- FUJITSU LIMITED
- Masao Taguchi
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Semiconductor integrated circuit with input/output interface adapte...
- Publication number 20030042944
- Publication date Mar 6, 2003
- FUJITSU LIMITED
- Masao Taguchi
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Semiconductor device using complementary clock and signal input sta...
- Publication number 20020153933
- Publication date Oct 24, 2002
- FUJITSU LIMITED
- Masao Taguchi
- G11 - INFORMATION STORAGE
Information Patent Application
Semiconductor device with circuitry for efficient information exchange
- Publication number 20020125499
- Publication date Sep 12, 2002
- FUJITSU LIMITED
- Yasurou Matsuzaki
- G11 - INFORMATION STORAGE
Information Patent Application
Semiconductor device and multichip module
- Publication number 20020060933
- Publication date May 23, 2002
- FUJITSU LIMITED
- Yasurou Matsuzaki
- G11 - INFORMATION STORAGE
Information Patent Application
VARIABLE DELAY CIRCUIT AND SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
- Publication number 20020021157
- Publication date Feb 21, 2002
- Satoshi Eto
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Semiconductor memory device having an SRAM and a DRAM on a single chip
- Publication number 20020006071
- Publication date Jan 17, 2002
- FUJITSU LIMITED
- Hitoshi Ikeda
- G11 - INFORMATION STORAGE
Information Patent Application
SIGNAL TRANSMISSION WITH REDUCED RINGING OF SIGNALS
- Publication number 20020000847
- Publication date Jan 3, 2002
- MASAO TAGUCHI
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Semiconductor memory device
- Publication number 20010021140
- Publication date Sep 13, 2001
- FUJITSU LIMITED
- Shinya Fujioka
- G11 - INFORMATION STORAGE
Information Patent Application
Semiconductor device using complementary clock and signal input sta...
- Publication number 20010005157
- Publication date Jun 28, 2001
- FUJITSU LIMITED
- Masao Taguchi
- G11 - INFORMATION STORAGE
Information Patent Application
Reference voltage generation circuit using source followers
- Publication number 20010005160
- Publication date Jun 28, 2001
- FUJITSU LIMITED
- Masao Taguchi
- G05 - CONTROLLING REGULATING
Information Patent Application
LSI device with memory and logics mounted thereon
- Publication number 20010002179
- Publication date May 31, 2001
- FUJITSU LIMITED
- Hiroyoshi Tomita
- H01 - BASIC ELECTRIC ELEMENTS

Masao Taguchi

Person

Patents Grantslast 30 patents

Semiconductor device with circuitry for efficient information exchange

Direct tunneling memory with separated transistor and tunnel areas

Direct tunneling memory with separated transistor and tunnel areas

Semiconductor integrated circuit with input/output interface adapte...

Semiconductor integrated circuit with input/output interface adapte...

Semiconductor memory device having an SRAM and a DRAM on a single chip

Semiconductor memory device and electronic apparatus

Semiconductor integrated circuit with input/output interface adapte...

Semiconductor integrated circuit with input/output interface adapte...

Semiconductor memory device having a refresh operation

Semiconductor device and multichip module

Semiconductor memory device for operating in synchronization with e...

Semiconductor device using complementary clock and signal input sta...

Input/output data synchronizing device

Semiconductor integrated circuit with input/output interface adapte...

Bus configuration and input/output buffer

Semiconductor memory device

Dynamic memory circuit with automatic refresh function

Semiconductor device using complementary clock and signal input sta...

Memory subsystem operated in synchronism with a clock

Electronic circuit apparatus for transmitting signals through a bus...

Variable delay circuit and semiconductor integrated circuit device

Signal transmission with reduced ringing of signals

Semiconductor device using complementary clock and signal input sta...

Reference voltage generation circuit using source followers

Semiconductor device, semiconductor system, and digital delay circuit

Semiconductor memory device having an SRAM and a DRAM on a single chip

LSI device with memory and logics mounted thereon

Semiconductor memory device

Semiconductor device using complementary clock and signal input sta...

Patents Applicationslast 30 patents

Memory cell array with low resistance common source and high curren...

Direct tunneling memory with separated transistor and tunnel areas

Semiconductor device, semiconductor system, and digital delay circuit

Direct tunneling memory with separated transistor and tunnel areas

Semiconductor memory device and electronic apparatus

Semiconductor integrated circuit with input/output interface adapte...

Semiconductor integrated circuit with input/output interface adapte...

Semiconductor integrated circuit with input/output interface adapte...

Semiconductor integrated circuit with input/output interface adapte...

Semiconductor device using complementary clock and signal input sta...

Semiconductor device with circuitry for efficient information exchange

Semiconductor device and multichip module

VARIABLE DELAY CIRCUIT AND SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE

Semiconductor memory device having an SRAM and a DRAM on a single chip

SIGNAL TRANSMISSION WITH REDUCED RINGING OF SIGNALS

Semiconductor memory device

Semiconductor device using complementary clock and signal input sta...

Reference voltage generation circuit using source followers

LSI device with memory and logics mounted thereon