Matteo Patelmo

Person

Trezzo Sull'Adda, IT

People

Patents Grantslast 30 patents

Information Patent Grant
Method and circuit for locating anomalous memory cells
- Patent number 7,072,239
- Issue date Jul 4, 2006
- STMicroelectronics S.r.l.
- Matteo Patelmo
- G11 - INFORMATION STORAGE
Information Patent Grant
Non-volatile high-performance memory device and relative manufactur...
- Patent number 6,677,206
- Issue date Jan 13, 2004
- STMicroelectronics S.r.l.
- Matteo Patelmo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for manufacturing electronic devices having non-volatile mem...
- Patent number 6,624,015
- Issue date Sep 23, 2003
- STMicroelectronics S.r.l.
- Matteo Patelmo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Mask programmed ROM inviolable by reverse engineering inspections a...
- Patent number 6,614,080
- Issue date Sep 2, 2003
- STMicroelectronics S.r.l.
- Bruno Vajana
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for obtaining a multi-level ROM in an EEPROM process flow
- Patent number 6,576,517
- Issue date Jun 10, 2003
- STMicroelectronics S.r.l.
- Matteo Patelmo
- G11 - INFORMATION STORAGE
Information Patent Grant
Process for manufacturing electronic devices having non-salicidated...
- Patent number 6,573,130
- Issue date Jun 3, 2003
- STMicroelectronics S.r.l.
- Matteo Patelmo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Process for the manufacture of integrated devices with gate oxide p...
- Patent number 6,551,892
- Issue date Apr 22, 2003
- STMicroelectronics S.r.l.
- Matteo Patelmo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Anti-deciphering contacts
- Patent number 6,528,885
- Issue date Mar 4, 2003
- STMicroelectronics S.r.l.
- Bruno Vajana
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method for forming a multilevel ROM memory in a dual gate CMOS proc...
- Patent number 6,521,957
- Issue date Feb 18, 2003
- STMicroelectronics S.r.l.
- Matteo Patelmo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Process for manufacturing electronic devices comprising high voltag...
- Patent number 6,501,147
- Issue date Dec 31, 2002
- STMicroelectronics S.r.l.
- Bruno Vajana
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Simplified process for defining the tunnel area in non-aligned, non...
- Patent number 6,444,526
- Issue date Sep 3, 2002
- STMicroelectronics S.r.l.
- Matteo Patelmo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for manufacturing electronic devices having HV transistors a...
- Patent number 6,420,769
- Issue date Jul 16, 2002
- STMicroelectronics S.r.l.
- Matteo Patelmo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
High efficiency memory device
- Patent number 6,414,349
- Issue date Jul 2, 2002
- STMicroelectronics S.r.l.
- Giovanna Dalla Libera
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for manufacturing electronic devices comprising non-volatile...
- Patent number 6,396,101
- Issue date May 28, 2002
- STMicroelectronics S.r.l.
- Matteo Patelmo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Process for manufacturing nonvolatile memory cells with dimensional...
- Patent number 6,350,652
- Issue date Feb 26, 2002
- STMicroelectronics S.r.l.
- Giovanna Dalla Libera
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for manufacturing electronic devices having non-volatile mem...
- Patent number 6,351,008
- Issue date Feb 26, 2002
- STMicroelectronics S.r.l.
- Matteo Patelmo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Process for manufacturing nonvolatile memory cells with dimensional...
- Patent number 6,340,828
- Issue date Jan 22, 2002
- STMicroelectronics S.r.l.
- Giovanna Dalla Libera
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Process for manufacturing an electronic device including MOS transi...
- Patent number 6,300,181
- Issue date Oct 9, 2001
- STMicroelectronics S.r.l.
- Matteo Patelmo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of making high-voltage HV transistors with drain extension i...
- Patent number 6,284,607
- Issue date Sep 4, 2001
- STMicroelectronics S.r.l.
- Matteo Patelmo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for manufacturing electronic devices comprising non-volatile...
- Patent number 6,281,077
- Issue date Aug 28, 2001
- STMicroelectronics S.r.l.
- Matteo Patelmo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Process for the manufacture of integrated devices with gate oxide p...
- Patent number 6,278,159
- Issue date Aug 21, 2001
- STMicroelectronics S.r.l.
- Matteo Patelmo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for manufacturing electronic devices, comprising non-salicid...
- Patent number 6,274,411
- Issue date Aug 14, 2001
- STMicroelectronics S.r.l.
- Matteo Patelmo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for manufacturing electronic devices having HV transistors a...
- Patent number 6,251,728
- Issue date Jun 26, 2001
- STMicroelectronics S.r.l.
- Matteo Patelmo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Eeprom cell with improved current performance
- Patent number 6,240,011
- Issue date May 29, 2001
- STMicroelectronics S.r.l.
- Giovanna Dalla Libera
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for forming a muti-level ROM memory in a dual gate CMOS proc...
- Patent number 6,177,313
- Issue date Jan 23, 2001
- STMicroelectronics S.r.l.
- Matteo Patelmo
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
INTEGRATED ELECTRONIC CIRCUIT INCLUDING A FIELD PLATE FOR THE LOCAL...
- Publication number 20220384585
- Publication date Dec 1, 2022
- STMicroelectronics S.r.l
- Elisabetta PIZZI
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method and circuit for locating anomalous memory cells
- Publication number 20050169089
- Publication date Aug 4, 2005
- STMicroelectronics S.r.I.
- Matteo Patelmo
- G11 - INFORMATION STORAGE
Information Patent Application
Anti-deciphering contacts
- Publication number 20020079564
- Publication date Jun 27, 2002
- STMicroelectronics S.r.l.
- Bruno Vajana
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Mask programmed ROM inviolable by reverse engineering inspections a...
- Publication number 20020063268
- Publication date May 30, 2002
- STMicroelectronics S.r. I.
- Bruno Vajana
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method for manufacturing electronic devices having non-volatile mem...
- Publication number 20020040993
- Publication date Apr 11, 2002
- STMicroelectronics S.r.l.
- Matteo Patelmo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Process for the manufacture of integrated devices with gate oxide p...
- Publication number 20010036707
- Publication date Nov 1, 2001
- Matteo Patelmo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Non-volatile high-performance memory device and relative manufactur...
- Publication number 20010030335
- Publication date Oct 18, 2001
- Matteo Patelmo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method for manufacturing electronic devices having HV transistors a...
- Publication number 20010024861
- Publication date Sep 27, 2001
- Matteo Patelmo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Integrated MOS transistor with a high threshold voltage and low mul...
- Publication number 20010022380
- Publication date Sep 20, 2001
- Matteo Patelmo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method for manufacturing electronic devices comprising non-volatile...
- Publication number 20010021556
- Publication date Sep 13, 2001
- Matteo Patelmo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method for forming a multilevel ROM memory in a dual gate CMOS proc...
- Publication number 20010001721
- Publication date May 24, 2001
- Matteo Patelmo
- H01 - BASIC ELECTRIC ELEMENTS

Matteo Patelmo

Person

Patents Grantslast 30 patents

Method and circuit for locating anomalous memory cells

Non-volatile high-performance memory device and relative manufactur...

Method for manufacturing electronic devices having non-volatile mem...

Mask programmed ROM inviolable by reverse engineering inspections a...

Method for obtaining a multi-level ROM in an EEPROM process flow

Process for manufacturing electronic devices having non-salicidated...

Process for the manufacture of integrated devices with gate oxide p...

Anti-deciphering contacts

Method for forming a multilevel ROM memory in a dual gate CMOS proc...

Process for manufacturing electronic devices comprising high voltag...

Simplified process for defining the tunnel area in non-aligned, non...

Method for manufacturing electronic devices having HV transistors a...

High efficiency memory device

Method for manufacturing electronic devices comprising non-volatile...

Process for manufacturing nonvolatile memory cells with dimensional...

Method for manufacturing electronic devices having non-volatile mem...

Process for manufacturing nonvolatile memory cells with dimensional...

Process for manufacturing an electronic device including MOS transi...

Method of making high-voltage HV transistors with drain extension i...

Method for manufacturing electronic devices comprising non-volatile...

Process for the manufacture of integrated devices with gate oxide p...

Method for manufacturing electronic devices, comprising non-salicid...

Method for manufacturing electronic devices having HV transistors a...

Eeprom cell with improved current performance

Method for forming a muti-level ROM memory in a dual gate CMOS proc...

Patents Applicationslast 30 patents

INTEGRATED ELECTRONIC CIRCUIT INCLUDING A FIELD PLATE FOR THE LOCAL...

Method and circuit for locating anomalous memory cells

Anti-deciphering contacts

Mask programmed ROM inviolable by reverse engineering inspections a...

Method for manufacturing electronic devices having non-volatile mem...

Process for the manufacture of integrated devices with gate oxide p...

Non-volatile high-performance memory device and relative manufactur...

Method for manufacturing electronic devices having HV transistors a...

Integrated MOS transistor with a high threshold voltage and low mul...

Method for manufacturing electronic devices comprising non-volatile...

Method for forming a multilevel ROM memory in a dual gate CMOS proc...