Michael John Sebastian Smith

Person

Palo Alto, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Memory circuit simulation with power saving capabilities
- Patent number 8,340,953
- Issue date Dec 25, 2012
- Google, Inc.
- Suresh Natarajan Rajan
- G11 - INFORMATION STORAGE
Information Patent Grant
Adjusting the timing of signals associated with a memory system
- Patent number 8,327,104
- Issue date Dec 4, 2012
- Google Inc.
- Michael John Sebastian Smith
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory circuit simulation system and method with refresh capabilities
- Patent number 8,280,714
- Issue date Oct 2, 2012
- Google Inc.
- Suresh Natarajan Rajan
- G11 - INFORMATION STORAGE
Information Patent Grant
Optimal channel design for memory devices for providing a high-spee...
- Patent number 8,279,690
- Issue date Oct 2, 2012
- Google Inc.
- Min Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory circuit system and method
- Patent number 8,244,971
- Issue date Aug 14, 2012
- Google Inc.
- Suresh Natarajan Rajan
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory circuit system and method
- Patent number 8,209,479
- Issue date Jun 26, 2012
- Google Inc.
- Suresh Natarajan Rajan
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Grant
Performing power management operations
- Patent number 8,181,048
- Issue date May 15, 2012
- Google Inc.
- Suresh Natarajan Rajan
- G11 - INFORMATION STORAGE
Information Patent Grant
Programming of DIMM termination resistance values
- Patent number 8,169,233
- Issue date May 1, 2012
- Google Inc.
- Philip Arnold Ferolito
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Grant
Delaying a signal communicated from a system to at least one of a p...
- Patent number 8,154,935
- Issue date Apr 10, 2012
- Google Inc.
- Suresh Natarajan Rajan
- G11 - INFORMATION STORAGE
Information Patent Grant
Multi-rank partial width memory modules
- Patent number 8,130,560
- Issue date Mar 6, 2012
- Google Inc.
- Suresh Natarajan Rajan
- G11 - INFORMATION STORAGE
Information Patent Grant
Apparatus for simulating an aspect of a memory circuit
- Patent number 8,112,266
- Issue date Feb 7, 2012
- Google Inc.
- Suresh Natarajan Rajan
- G11 - INFORMATION STORAGE
Information Patent Grant
Optimal channel design for memory devices for providing a high-spee...
- Patent number 8,111,566
- Issue date Feb 7, 2012
- Google, Inc.
- Min Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method for simulating an aspect of a memory circuit
- Patent number 8,090,897
- Issue date Jan 3, 2012
- Google Inc.
- Suresh Natarajan Rajan
- G11 - INFORMATION STORAGE
Information Patent Grant
Providing additional space between an integrated circuit and a circ...
- Patent number 8,080,874
- Issue date Dec 20, 2011
- Google Inc.
- Jeremy Werner
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Embossed heat spreader
- Patent number 8,081,474
- Issue date Dec 20, 2011
- Google Inc.
- Wael O. Zohni
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Memory refresh apparatus and method
- Patent number 8,077,535
- Issue date Dec 13, 2011
- Google Inc.
- Keith R. Schakel
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory systems and memory modules
- Patent number 8,060,774
- Issue date Nov 15, 2011
- Google Inc.
- Michael John Sebastian Smith
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device with emulated characteristics
- Patent number 8,041,881
- Issue date Oct 18, 2011
- Google Inc.
- Suresh Natarajan Rajan
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory apparatus operable to perform a power-saving operation
- Patent number 8,019,589
- Issue date Sep 13, 2011
- Google Inc.
- Suresh Natarajan Rajan
- G11 - INFORMATION STORAGE
Information Patent Grant
System and method of handling erroneous data in computer systems
- Patent number 7,925,931
- Issue date Apr 12, 2011
- NVIDIA Corporation
- Michael John Sebastian Smith
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Interface circuit system and method for performing power management...
- Patent number 7,761,724
- Issue date Jul 20, 2010
- Google Inc.
- Suresh Natarajan Rajan
- G11 - INFORMATION STORAGE
Information Patent Grant
Interface circuit system and method for autonomously performing pow...
- Patent number 7,730,338
- Issue date Jun 1, 2010
- Google Inc.
- Suresh Natarajan Rajan
- G11 - INFORMATION STORAGE
Information Patent Grant
System and method for delaying a signal communicated from a system...
- Patent number 7,724,589
- Issue date May 25, 2010
- Google Inc.
- Suresh Natarajan Rajan
- G11 - INFORMATION STORAGE
Information Patent Grant
System and method for simulating an aspect of a memory circuit
- Patent number 7,609,567
- Issue date Oct 27, 2009
- MetaRAM, Inc.
- Suresh Natarajan Rajan
- G11 - INFORMATION STORAGE
Information Patent Grant
System and method for power management in memory systems
- Patent number 7,590,796
- Issue date Sep 15, 2009
- MetaRAM, Inc.
- Suresh Natarajan Rajan
- G11 - INFORMATION STORAGE
Information Patent Grant
Interface circuit system and method for performing power saving ope...
- Patent number 7,581,127
- Issue date Aug 25, 2009
- MetaRAM, Inc.
- Suresh Natarajan Rajan
- G11 - INFORMATION STORAGE
Information Patent Grant
Power saving system and method for use with a plurality of memory c...
- Patent number 7,580,312
- Issue date Aug 25, 2009
- MetaRAM, Inc.
- Suresh Natarajan Rajan
- G11 - INFORMATION STORAGE
Information Patent Grant
Gigabit ethernet adapter supporting the iSCSI and IPSEC protocols
- Patent number 7,535,913
- Issue date May 19, 2009
- NVIDIA Corporation
- John Shigeto Minami
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Interface circuit system and method for performing power management...
- Patent number 7,472,220
- Issue date Dec 30, 2008
- MetaRAM, Inc.
- Suresh Natarajan Rajan
- G11 - INFORMATION STORAGE
Information Patent Grant
Interface circuit system and method for autonomously performing pow...
- Patent number 7,392,338
- Issue date Jun 24, 2008
- MetaRAM, Inc.
- Suresh Natarajan Rajan
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
ADJUSTING THE TIMING OF SIGNALS ASSOCIATED WITH A MEMORY SYSTEM
- Publication number 20130007399
- Publication date Jan 3, 2013
- Google Inc.
- Michael John Sebastian Smith
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INTERFACE CIRCUIT SYSTEM AND METHOD FOR PERFORMING POWER MANAGEMENT...
- Publication number 20120226924
- Publication date Sep 6, 2012
- Google Inc.
- Suresh Natarajan Rajan
- G11 - INFORMATION STORAGE
Information Patent Application
PROGRAMMING OF DIMM TERMINATION RESISTANCE VALUES
- Publication number 20120206165
- Publication date Aug 16, 2012
- Google Inc.
- Philip Arnold Ferolito
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY CIRCUIT SYSTEM AND METHOD
- Publication number 20120201088
- Publication date Aug 9, 2012
- Google Inc.
- Suresh Natarajan Rajan
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY REFRESH APPARATUS AND METHOD
- Publication number 20120147684
- Publication date Jun 14, 2012
- Google Inc.
- Keith R. Schakel
- G11 - INFORMATION STORAGE
Information Patent Application
APPARATUS AND METHOD FOR POWER MANAGEMENT OF MEMORY CIRCUITS BY A S...
- Publication number 20120124281
- Publication date May 17, 2012
- Google Inc.
- Suresh Natarajan Rajan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
System and Method for Simulating an Aspect of a Memory Circuit
- Publication number 20120109621
- Publication date May 3, 2012
- Google Inc.
- Suresh Natarajan Rajan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Storage array controller for flash-based storage devices
- Publication number 20120059978
- Publication date Mar 8, 2012
- Daniel L. Rosenband
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
STORAGE ARRAY CONTROLLER FOR SOLID-STATE STORAGE DEVICES
- Publication number 20120059976
- Publication date Mar 8, 2012
- Daniel L. Rosenband
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY SYSTEMS AND MEMORY MODULES
- Publication number 20120042204
- Publication date Feb 16, 2012
- GOOGLE, INC.
- Michael John Sebastian Smith
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SIMULATING A MEMORY STANDARD
- Publication number 20120011310
- Publication date Jan 12, 2012
- Google Inc.
- Suresh Natarajan Rajan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SIMULATING A REFRESH OPERATION LATENCY
- Publication number 20120008436
- Publication date Jan 12, 2012
- Google Inc.
- Suresh Natarajan Rajan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY APPARATUS OPERABLE TO PERFORM A POWER-SAVING OPERATION
- Publication number 20120011386
- Publication date Jan 12, 2012
- Google Inc.
- Suresh Natarajan Rajan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROGRAMMING OF DIMM TERMINATION RESISTANCE VALUES
- Publication number 20110095783
- Publication date Apr 28, 2011
- Google Inc.
- Philip Arnold Ferolito
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Interface Circuit System And Method For Performing Power Management...
- Publication number 20100281280
- Publication date Nov 4, 2010
- Google Inc.
- Suresh Natarajan Rajan
- G11 - INFORMATION STORAGE
Information Patent Application
System and Method for Delaying a Signal Communicated from a System...
- Publication number 20100271888
- Publication date Oct 28, 2010
- Google Inc.
- Suresh Natarajan Rajan
- G11 - INFORMATION STORAGE
Information Patent Application
APPARATUS AND METHOD FOR POWER MANAGEMENT OF MEMORY CIRCUITS BY A S...
- Publication number 20100257304
- Publication date Oct 7, 2010
- Google Inc.
- Suresh Natarajan Rajan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEM AND METHOD FOR SIMULATING AN ASPECT OF A MEMORY CIRCUIT
- Publication number 20090285031
- Publication date Nov 19, 2009
- Suresh Natarajan Rajan
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY CIRCUIT SYSTEM AND METHOD
- Publication number 20090024789
- Publication date Jan 22, 2009
- Suresh Natarajan Rajan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INTERFACE CIRCUIT SYSTEM AND METHOD FOR AUTONOMOUSLY PERFORMING POW...
- Publication number 20080239858
- Publication date Oct 2, 2008
- Suresh Natarajan Rajan
- G11 - INFORMATION STORAGE
Information Patent Application
INTERFACE CIRCUIT SYSTEM AND METHOD FOR PERFORMING POWER MANAGEMENT...
- Publication number 20080239857
- Publication date Oct 2, 2008
- Suresh Natarajan Rajan
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE WITH EMULATED CHARACTERISTICS
- Publication number 20080126692
- Publication date May 29, 2008
- Suresh Natarajan Rajan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY DEVICE WITH EMULATED CHARACTERISTICS
- Publication number 20080126689
- Publication date May 29, 2008
- Suresh Natarajan Rajan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
COMBINED SIGNAL DELAY AND POWER SAVING SYSTEM AND METHOD FOR USE WI...
- Publication number 20080123459
- Publication date May 29, 2008
- METARAM, INC.
- Suresh Natarajan Rajan
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE WITH EMULATED CHARACTERISTICS
- Publication number 20080126687
- Publication date May 29, 2008
- Suresh Natarajan Rajan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY DEVICE WITH EMULATED CHARACTERISTICS
- Publication number 20080126688
- Publication date May 29, 2008
- Suresh Natarajan Rajan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEM AND METHOD FOR REDUCING COMMAND SCHEDULING CONSTRAINTS OF ME...
- Publication number 20080120443
- Publication date May 22, 2008
- Suresh Natarajan Rajan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEM AND METHOD FOR ADJUSTING THE TIMING OF SIGNALS ASSOCIATED WI...
- Publication number 20080115006
- Publication date May 15, 2008
- Michael John Sebastian Smith
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and apparatus for refresh management of memory modules
- Publication number 20080109598
- Publication date May 8, 2008
- Keith R. Schakel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
APPARATUS AND METHOD FOR POWER MANAGEMENT OF MEMORY CIRCUITS BY A S...
- Publication number 20080082763
- Publication date Apr 3, 2008
- METARAM, INC.
- Suresh Natarajan Rajan
- G06 - COMPUTING CALCULATING COUNTING

Michael John Sebastian Smith

Person

Patents Grantslast 30 patents

Memory circuit simulation with power saving capabilities

Adjusting the timing of signals associated with a memory system

Memory circuit simulation system and method with refresh capabilities

Optimal channel design for memory devices for providing a high-spee...

Memory circuit system and method

Memory circuit system and method

Performing power management operations

Programming of DIMM termination resistance values

Delaying a signal communicated from a system to at least one of a p...

Multi-rank partial width memory modules

Apparatus for simulating an aspect of a memory circuit

Optimal channel design for memory devices for providing a high-spee...

System and method for simulating an aspect of a memory circuit

Providing additional space between an integrated circuit and a circ...

Embossed heat spreader

Memory refresh apparatus and method

Memory systems and memory modules

Memory device with emulated characteristics

Memory apparatus operable to perform a power-saving operation

System and method of handling erroneous data in computer systems

Interface circuit system and method for performing power management...

Interface circuit system and method for autonomously performing pow...

System and method for delaying a signal communicated from a system...

System and method for simulating an aspect of a memory circuit

System and method for power management in memory systems

Interface circuit system and method for performing power saving ope...

Power saving system and method for use with a plurality of memory c...

Gigabit ethernet adapter supporting the iSCSI and IPSEC protocols

Interface circuit system and method for performing power management...

Interface circuit system and method for autonomously performing pow...

Patents Applicationslast 30 patents

ADJUSTING THE TIMING OF SIGNALS ASSOCIATED WITH A MEMORY SYSTEM

INTERFACE CIRCUIT SYSTEM AND METHOD FOR PERFORMING POWER MANAGEMENT...

PROGRAMMING OF DIMM TERMINATION RESISTANCE VALUES

MEMORY CIRCUIT SYSTEM AND METHOD

MEMORY REFRESH APPARATUS AND METHOD

APPARATUS AND METHOD FOR POWER MANAGEMENT OF MEMORY CIRCUITS BY A S...

System and Method for Simulating an Aspect of a Memory Circuit

Storage array controller for flash-based storage devices

STORAGE ARRAY CONTROLLER FOR SOLID-STATE STORAGE DEVICES

MEMORY SYSTEMS AND MEMORY MODULES

SIMULATING A MEMORY STANDARD

SIMULATING A REFRESH OPERATION LATENCY

MEMORY APPARATUS OPERABLE TO PERFORM A POWER-SAVING OPERATION

PROGRAMMING OF DIMM TERMINATION RESISTANCE VALUES

Interface Circuit System And Method For Performing Power Management...

System and Method for Delaying a Signal Communicated from a System...

APPARATUS AND METHOD FOR POWER MANAGEMENT OF MEMORY CIRCUITS BY A S...

SYSTEM AND METHOD FOR SIMULATING AN ASPECT OF A MEMORY CIRCUIT

MEMORY CIRCUIT SYSTEM AND METHOD

INTERFACE CIRCUIT SYSTEM AND METHOD FOR AUTONOMOUSLY PERFORMING POW...

INTERFACE CIRCUIT SYSTEM AND METHOD FOR PERFORMING POWER MANAGEMENT...

MEMORY DEVICE WITH EMULATED CHARACTERISTICS

MEMORY DEVICE WITH EMULATED CHARACTERISTICS

COMBINED SIGNAL DELAY AND POWER SAVING SYSTEM AND METHOD FOR USE WI...

MEMORY DEVICE WITH EMULATED CHARACTERISTICS

MEMORY DEVICE WITH EMULATED CHARACTERISTICS

SYSTEM AND METHOD FOR REDUCING COMMAND SCHEDULING CONSTRAINTS OF ME...

SYSTEM AND METHOD FOR ADJUSTING THE TIMING OF SIGNALS ASSOCIATED WI...

Method and apparatus for refresh management of memory modules

APPARATUS AND METHOD FOR POWER MANAGEMENT OF MEMORY CIRCUITS BY A S...