Michael P. Krau

Person

Hagar Township, Berrien County, MI, US

People

Patents Grantslast 30 patents

Information Patent Grant
Suspend/resume capability for a protected mode microprocesser
- Patent number 6,378,068
- Issue date Apr 23, 2002
- NEC Corporation
- Mark J. Foster
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Suspend/resume capability for a protected mode microprocessor
- Patent number 6,301,673
- Issue date Oct 9, 2001
- NEC Corporation
- Mark J. Foster
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Suspend/resume capability for a protected mode microprocessor
- Patent number 6,223,293
- Issue date Apr 24, 2001
- NEC Corporation
- Mark J. Foster
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Programmable hardware timer including two programmable hardware dow...
- Patent number 5,987,618
- Issue date Nov 16, 1999
- Packard Bell NEC
- David T. DeRoo
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method for warm boot from reset
- Patent number 5,872,967
- Issue date Feb 16, 1999
- Packard Bell NEC
- David T. DeRoo
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method to store privileged data within the primary CPU memory space
- Patent number 5,867,655
- Issue date Feb 2, 1999
- Packard Bell NEC
- David T. DeRoo
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Disk based bios
- Patent number 5,864,698
- Issue date Jan 26, 1999
- Packard Bell NEC
- Michael Paul Krau
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Programmable hardware counter
- Patent number 5,809,290
- Issue date Sep 15, 1998
- Packard Bell NEC
- David T. DeRoo
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Write once read only registers
- Patent number 5,802,376
- Issue date Sep 1, 1998
- Packard Bell NEC
- David T. DeRoo
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Write once read only registers
- Patent number 5,764,995
- Issue date Jun 9, 1998
- Packard Bell NEC
- David T. DeRoo
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Suspend/resume capability for a protected mode microprocessor
- Patent number 5,765,004
- Issue date Jun 9, 1998
- Vantus Technologies, Inc.
- Mark J. Foster
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Write inhibited registers
- Patent number 5,752,063
- Issue date May 12, 1998
- Packard Bell NEC
- David T. DeRoo
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Alternate I/O port access to standard register set
- Patent number 5,742,841
- Issue date Apr 21, 1998
- Packard Bell NEC
- David T. DeRoo
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for preventing unauthorized access to peripher...
- Patent number 5,687,379
- Issue date Nov 11, 1997
- Packard Bell NEC
- Jimmy Dean Smith
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Interrupt for a protected mode microprocessor which facilitates tra...
- Patent number 5,652,890
- Issue date Jul 29, 1997
- Vantus Technologies, Inc.
- Mark J. Foster
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus for maintaining one interrupt mask register in conformity...
- Patent number 5,551,033
- Issue date Aug 27, 1996
- Zenith Data Systems Corporation
- Mark J. Foster
- G06 - COMPUTING CALCULATING COUNTING

Michael P. Krau

Person

Patents Grantslast 30 patents

Suspend/resume capability for a protected mode microprocesser

Suspend/resume capability for a protected mode microprocessor

Suspend/resume capability for a protected mode microprocessor

Programmable hardware timer including two programmable hardware dow...

Method for warm boot from reset

Method to store privileged data within the primary CPU memory space

Disk based bios

Programmable hardware counter

Write once read only registers

Write once read only registers

Suspend/resume capability for a protected mode microprocessor

Write inhibited registers

Alternate I/O port access to standard register set

Method and apparatus for preventing unauthorized access to peripher...

Interrupt for a protected mode microprocessor which facilitates tra...

Apparatus for maintaining one interrupt mask register in conformity...