Michael ThaiThanh Phan

Person

Apex, NC, US

People

Patents Grantslast 30 patents

Information Patent Grant
Memory device implementing multiple port read
- Patent number 11,367,480
- Issue date Jun 21, 2022
- Marvell Asia Pte, Ltd.
- Michael ThaiThanh Phan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Bitline-driven sense amplifier clocking scheme
- Patent number 10,559,352
- Issue date Feb 11, 2020
- QUALCOMM Incorporated
- Harish Shankar
- G11 - INFORMATION STORAGE
Information Patent Grant
Providing efficient handling of memory array failures in processor-...
- Patent number 10,541,044
- Issue date Jan 21, 2020
- QUALCOMM Incorporated
- Thomas Philip Speier
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Cache memory clock generation circuits for reducing power consumpti...
- Patent number 10,156,887
- Issue date Dec 18, 2018
- QUALCOMM Incorporated
- Michael Phan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus of reducing leakage power in multiple port SRA...
- Patent number 8,824,230
- Issue date Sep 2, 2014
- QUALCOMM Incorporated
- Michael ThaiThanh Phan
- G11 - INFORMATION STORAGE
Information Patent Grant
SRAM cell writability
- Patent number 8,730,713
- Issue date May 20, 2014
- QUALCOMM Incorporated
- Manish Garg
- G11 - INFORMATION STORAGE
Information Patent Grant
Apparatus for selective word-line boost on a memory cell
- Patent number 8,724,373
- Issue date May 13, 2014
- QUALCOMM Incorporated
- Manish Garg
- G11 - INFORMATION STORAGE
Information Patent Grant
Adaptive read wordline voltage boosting apparatus and method for mu...
- Patent number 8,659,972
- Issue date Feb 25, 2014
- QUALCOMM Incorporated
- Michael ThaiThanh Phan
- G11 - INFORMATION STORAGE
Information Patent Grant
Low leakage high performance static random access memory cell using...
- Patent number 8,576,612
- Issue date Nov 5, 2013
- QUALCOMM Incorporated
- Manish Garg
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and apparatus for reducing power consumption in a content ad...
- Patent number 8,154,900
- Issue date Apr 10, 2012
- QUALCOMM Incorporated
- Chiaming Chai
- G11 - INFORMATION STORAGE
Information Patent Grant
Low leakage high performance static random access memory cell using...
- Patent number 7,961,499
- Issue date Jun 14, 2011
- QUALCOMM Incorporated
- Manish Garg
- G11 - INFORMATION STORAGE
Information Patent Grant
Content addressable memory
- Patent number 7,952,901
- Issue date May 31, 2011
- QUALCOMM Incorporated
- Chiaming Chai
- G11 - INFORMATION STORAGE
Information Patent Grant
High speed CAM lookup using stored encoded key
- Patent number 7,761,774
- Issue date Jul 20, 2010
- QUALCOMM Incorporated
- Jeffrey Herbert Fischer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for reducing power consumption in a content ad...
- Patent number 7,616,468
- Issue date Nov 10, 2009
- QUALCOMM Incorporated
- Chiaming Chai
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and apparatus for aborting content addressable memory search...
- Patent number 7,586,772
- Issue date Sep 8, 2009
- QUALCOMM Incorporated
- Chiaming Chai
- G11 - INFORMATION STORAGE
Information Patent Grant
Circuit and method for subdividing a CAMRAM bank by controlling a v...
- Patent number 7,242,600
- Issue date Jul 10, 2007
- QUALCOMM Incorporated
- Michael ThaiThanh Phan
- G11 - INFORMATION STORAGE
Information Patent Grant
Apparatus and method for power savings in high-performance CAM stru...
- Patent number 7,079,409
- Issue date Jul 18, 2006
- International Business Machines Corporation
- Chiaming Chai
- G11 - INFORMATION STORAGE
Information Patent Grant
Apparatus for detecting multiple hits in a CAMRAM memory array
- Patent number 6,816,396
- Issue date Nov 9, 2004
- International Business Machines Corporation
- Chiaming Chai
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and structure for a CAMRAM cache memory
- Patent number 6,556,466
- Issue date Apr 29, 2003
- International Business Machines Corporation
- Chiaming Chai
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Segmented match line arrangement for content addressable memory
- Patent number 6,452,822
- Issue date Sep 17, 2002
- International Business Machines Corporation
- Chiaming Chai
- G11 - INFORMATION STORAGE
Information Patent Grant
Redundant scheme for CAMRAM memory array
- Patent number 6,385,071
- Issue date May 7, 2002
- International Business Machines Corporation
- Chiaming Chai
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
Memory Device Implementing Multiple Port Read
- Publication number 20210174867
- Publication date Jun 10, 2021
- Marvell Asia Pte, Ltd.
- Michael ThaiThanh Phan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
BITLINE-DRIVEN SENSE AMPLIFIER CLOCKING SCHEME
- Publication number 20190214076
- Publication date Jul 11, 2019
- QUALCOMM Incorporated
- Harish SHANKAR
- G11 - INFORMATION STORAGE
Information Patent Application
PROVIDING EFFICIENT HANDLING OF MEMORY ARRAY FAILURES IN PROCESSOR-...
- Publication number 20180121274
- Publication date May 3, 2018
- QUALCOMM Incorporated
- Thomas Philip Speier
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CACHE MEMORY CLOCK GENERATION CIRCUITS FOR REDUCING POWER CONSUMPTI...
- Publication number 20180088659
- Publication date Mar 29, 2018
- QUALCOMM Incorporated
- Michael Phan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and Apparatus of Reducing Leakage Power in Multiple Port SRA...
- Publication number 20130083613
- Publication date Apr 4, 2013
- QUALCOMM Incorporated
- Michael ThaiThanh Phan
- G11 - INFORMATION STORAGE
Information Patent Application
SRAM CELL WRITABILITY
- Publication number 20130064004
- Publication date Mar 14, 2013
- QUALCOMM Incorporated
- Manish Garg
- G11 - INFORMATION STORAGE
Information Patent Application
Adaptive Read Wordline Voltage Boosting Apparatus and Method for Mu...
- Publication number 20130064031
- Publication date Mar 14, 2013
- QUALCOMM Incorporated
- Michael ThaiThanh Phan
- G11 - INFORMATION STORAGE
Information Patent Application
Apparatus for Selective Word-Line Boost on a Memory Cell
- Publication number 20130064006
- Publication date Mar 14, 2013
- QUALCOMM Incorporated
- Manish Garg
- G11 - INFORMATION STORAGE
Information Patent Application
Method and Apparatus for Suppressing Bitline Coupling Through Mille...
- Publication number 20110227639
- Publication date Sep 22, 2011
- QUALCOMM Incorporated
- Michael ThaiThanh Phan
- G11 - INFORMATION STORAGE
Information Patent Application
Low Leakage High Performance Static Random Access Memory Cell Using...
- Publication number 20110211386
- Publication date Sep 1, 2011
- QUALCOMM Incorporated
- Manish Garg
- G11 - INFORMATION STORAGE
Information Patent Application
Low Leakage High Performance Static Random Access Memory Cell Using...
- Publication number 20100182823
- Publication date Jul 22, 2010
- QUALCOMM Incorporated
- Manish Garg
- G11 - INFORMATION STORAGE
Information Patent Application
METHOD AND APPARATUS FOR REDUCING POWER CONSUMPTION IN A CONTENT AD...
- Publication number 20100023684
- Publication date Jan 28, 2010
- QUALCOMM Incorporated
- CHIAMING CHAI
- G11 - INFORMATION STORAGE
Information Patent Application
Content Addressable Memory
- Publication number 20090040801
- Publication date Feb 12, 2009
- QUALCOMM Incorporated
- Chiaming Chai
- G11 - INFORMATION STORAGE
Information Patent Application
Method and Apparatus for Reducing Power Consumption in a Content Ad...
- Publication number 20080031033
- Publication date Feb 7, 2008
- Chiaming Chai
- G11 - INFORMATION STORAGE
Information Patent Application
Method and Apparatus for Aborting Content Addressable Memory Search...
- Publication number 20080031040
- Publication date Feb 7, 2008
- Chiaming Chai
- G11 - INFORMATION STORAGE
Information Patent Application
High speed CAM lookup using stored encoded key
- Publication number 20070113158
- Publication date May 17, 2007
- Jeffrey Herbert Fischer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Circuit and method for subdividing a CAMRAM bank by controlling a v...
- Publication number 20070097722
- Publication date May 3, 2007
- Michael ThaiThanh Phan
- G11 - INFORMATION STORAGE
Information Patent Application
Apparatus and method for power savings in high-performance CAM stru...
- Publication number 20060018141
- Publication date Jan 26, 2006
- International Business Machines Corporation
- Chiaming Chai
- G11 - INFORMATION STORAGE
Information Patent Application
APPARATUS FOR DETECTING MULTIPLE HITS IN A CAMRAM MEMORY ARRAY
- Publication number 20040196700
- Publication date Oct 7, 2004
- International Business Machines Corp.
- Chiaming Chai
- G11 - INFORMATION STORAGE
Information Patent Application
Method and structure for a CAMRAM cache memory
- Publication number 20020159283
- Publication date Oct 31, 2002
- International Business Machines Corporation
- Chiaming Chai
- G06 - COMPUTING CALCULATING COUNTING

Michael ThaiThanh Phan

Person

Patents Grantslast 30 patents

Memory device implementing multiple port read

Bitline-driven sense amplifier clocking scheme

Providing efficient handling of memory array failures in processor-...

Cache memory clock generation circuits for reducing power consumpti...

Method and apparatus of reducing leakage power in multiple port SRA...

SRAM cell writability

Apparatus for selective word-line boost on a memory cell

Adaptive read wordline voltage boosting apparatus and method for mu...

Low leakage high performance static random access memory cell using...

Method and apparatus for reducing power consumption in a content ad...

Low leakage high performance static random access memory cell using...

Content addressable memory

High speed CAM lookup using stored encoded key

Method and apparatus for reducing power consumption in a content ad...

Method and apparatus for aborting content addressable memory search...

Circuit and method for subdividing a CAMRAM bank by controlling a v...

Apparatus and method for power savings in high-performance CAM stru...

Apparatus for detecting multiple hits in a CAMRAM memory array

Method and structure for a CAMRAM cache memory

Segmented match line arrangement for content addressable memory

Redundant scheme for CAMRAM memory array

Patents Applicationslast 30 patents

Memory Device Implementing Multiple Port Read

BITLINE-DRIVEN SENSE AMPLIFIER CLOCKING SCHEME

PROVIDING EFFICIENT HANDLING OF MEMORY ARRAY FAILURES IN PROCESSOR-...

CACHE MEMORY CLOCK GENERATION CIRCUITS FOR REDUCING POWER CONSUMPTI...

Method and Apparatus of Reducing Leakage Power in Multiple Port SRA...

SRAM CELL WRITABILITY

Adaptive Read Wordline Voltage Boosting Apparatus and Method for Mu...

Apparatus for Selective Word-Line Boost on a Memory Cell

Method and Apparatus for Suppressing Bitline Coupling Through Mille...

Low Leakage High Performance Static Random Access Memory Cell Using...

Low Leakage High Performance Static Random Access Memory Cell Using...

METHOD AND APPARATUS FOR REDUCING POWER CONSUMPTION IN A CONTENT AD...

Content Addressable Memory

Method and Apparatus for Reducing Power Consumption in a Content Ad...

Method and Apparatus for Aborting Content Addressable Memory Search...

High speed CAM lookup using stored encoded key

Circuit and method for subdividing a CAMRAM bank by controlling a v...

Apparatus and method for power savings in high-performance CAM stru...

APPARATUS FOR DETECTING MULTIPLE HITS IN A CAMRAM MEMORY ARRAY

Method and structure for a CAMRAM cache memory