Mike F. Chang

Person

Santa Clara, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Semiconductor including cup-shaped leadframe packaging techniques
- Patent number 9,040,356
- Issue date May 26, 2015
- Vishay Siliconix
- Mike Chang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit package for semiconductior devices with improved...
- Patent number 8,169,062
- Issue date May 1, 2012
- Alpha and Omega Semiconductor Incorporated
- Leeshawn Luo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit package for semiconductor devices with improved...
- Patent number 8,067,822
- Issue date Nov 29, 2011
- Alpha and Omega Semiconductor Incorporated
- Leeshawn Luo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods of achieving linear capacitance in symmetrical and asymmetr...
- Patent number 7,863,995
- Issue date Jan 4, 2011
- Alpha & Omega Semiconductor Ltd.
- Moses Ho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Inverted J-lead for power devices
- Patent number 7,633,140
- Issue date Dec 15, 2009
- Alpha and Omega Semiconductor Incorporated
- Leeshawn Luo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor die package including cup-shaped leadframe
- Patent number 7,595,547
- Issue date Sep 29, 2009
- Vishay Siliconix
- Mike Chang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit package for semiconductor devices having a reduc...
- Patent number 7,391,100
- Issue date Jun 24, 2008
- Alpha & Omega Semiconductor Limited
- Leeshawn Luo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Power semiconductor package
- Patent number 7,208,818
- Issue date Apr 24, 2007
- Alpha and Omega Semiconductor Ltd.
- Leeshawn Luo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor assembly with package using cup-shaped lead-frame
- Patent number 6,909,170
- Issue date Jun 21, 2005
- Siliconix Incorporated
- Mike Chang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit package for semiconductor devices with improved...
- Patent number 6,841,852
- Issue date Jan 11, 2005
- Leeshawn Luo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor die package including cup-shaped leadframe
- Patent number 6,744,124
- Issue date Jun 1, 2004
- Siliconix Incorporated
- Mike Chang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of making trench-gated MOSFET having cesium gate oxide layer
- Patent number 6,509,233
- Issue date Jan 21, 2003
- Siliconix Incorporated
- Mike Chang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of operation of punch-through field effect transistor
- Patent number 6,444,527
- Issue date Sep 3, 2002
- Siliconix Incorporated
- Brian H. Floyd
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of forming vertical planar DMOSFET with self-aligned contact
- Patent number 6,277,695
- Issue date Aug 21, 2001
- Siliconix Incorporated
- Richard K. Williams
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of fabricating a field effect transistor
- Patent number 6,090,716
- Issue date Jul 18, 2000
- Siliconix Incorporated
- Brian H. Floyd
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of making punch-through field effect transistor
- Patent number 6,069,043
- Issue date May 30, 2000
- Siliconix Incorporated
- Brian H. Floyd
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Long channel trench-gated power MOSFET having fully depleted body r...
- Patent number 5,998,834
- Issue date Dec 7, 1999
- Siliconix Incorporated
- Richard K. Williams
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Trench field effect transistor with reduced punch-through susceptib...
- Patent number 5,981,344
- Issue date Nov 9, 1999
- Siliconix Incorporated
- Fwu-Iuan Hshieh
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
High density trench DMOS transistor with trench bottom implant
- Patent number 5,929,481
- Issue date Jul 27, 1999
- Siliconix Incorporated
- Fwu-Iuan Hshieh
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Planar DMOS transistor fabricated by a three mask process
- Patent number 5,923,979
- Issue date Jul 13, 1999
- Siliconix Incorporated
- Dorman C. Pitzer
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Trenched field effect transistor with PN depletion barrier
- Patent number 5,917,216
- Issue date Jun 29, 1999
- Siliconix Incorporated
- Brian H. Floyd
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Field effect Trench transistor having lightly doped epitaxial regio...
- Patent number 5,910,669
- Issue date Jun 8, 1999
- Siliconix Incorporated
- Mike F. Chang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Trenched DMOS transistor with lightly doped tub
- Patent number 5,821,583
- Issue date Oct 13, 1998
- Siliconix Incorporated
- Fwu-Iuan Hshieh
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of forming low threshold voltage vertical power transistor u...
- Patent number 5,770,503
- Issue date Jun 23, 1998
- Siliconix Incorporated
- Fwu-Iuan Hshieh
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Surface mount and flip chip technology with diamond film passivatio...
- Patent number 5,767,578
- Issue date Jun 16, 1998
- Siliconix Incorporated
- Mike F. Chang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Surface mount and flip chip technology for total integrated circuit...
- Patent number 5,757,081
- Issue date May 26, 1998
- Siliconix Incorporated
- Mike F. Chang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Surface mount and flip chip technology for total integrated circuit...
- Patent number 5,753,529
- Issue date May 19, 1998
- Siliconix Incorporated
- Mike F. Chang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of forming a lateral field effect transistor having reduced...
- Patent number 5,750,416
- Issue date May 12, 1998
- Siliconix Incorporated
- Fwu-Iuan Hshieh
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
High density trenched DMOS transistor
- Patent number 5,689,128
- Issue date Nov 18, 1997
- Siliconix Incorporated
- Fwu-Iuan Hshieh
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Trenched DMOS transistor fabrication having thick termination regio...
- Patent number 5,639,676
- Issue date Jun 17, 1997
- Siliconix Incorporated
- Fwu-Iuan Hshieh
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
Integrated circuit package for semiconductior devices with improved...
- Publication number 20110221005
- Publication date Sep 15, 2011
- Leeshawn Luo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR PACKAGING TECHNIQUES
- Publication number 20090256246
- Publication date Oct 15, 2009
- VISHAY-SILICONIX
- Mike Chang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Integrated circuit package for semiconductior devices with improved...
- Publication number 20090014853
- Publication date Jan 15, 2009
- Leeshawn Luo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Methods of achieving linear capacitance in symmetrical and asymmetr...
- Publication number 20080310065
- Publication date Dec 18, 2008
- Alpha & Omega Semiconductor, LTD.
- Moses Ho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Power semiconductor package
- Publication number 20060017141
- Publication date Jan 26, 2006
- Leeshawn Luo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Multiple device package
- Publication number 20050280133
- Publication date Dec 22, 2005
- Alpha & Omega Semiconductor
- Leeshawn Luo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Integrated circuit package for semiconductor devices with improved...
- Publication number 20050145996
- Publication date Jul 7, 2005
- Leeshawn Luo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Inverted J-lead package for power devices
- Publication number 20050127532
- Publication date Jun 16, 2005
- Leeshawn Luo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Integrated circuit package for semicoductor devices with improved e...
- Publication number 20040004272
- Publication date Jan 8, 2004
- Leeshawn Luo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor assembly with package using cup-shaped lead frame
- Publication number 20030057532
- Publication date Mar 27, 2003
- Mike Chang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method of making trench-gated MOSFET having cesium gate oxide layer
- Publication number 20020123196
- Publication date Sep 5, 2002
- Mike Chang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD OF OPERATION OF PUNCH-THROUGH FIELD EFFECT TRANSISTOR
- Publication number 20020055232
- Publication date May 9, 2002
- BRIAN H. FLOYD
- H01 - BASIC ELECTRIC ELEMENTS

Mike F. Chang

Person

Patents Grantslast 30 patents

Semiconductor including cup-shaped leadframe packaging techniques

Integrated circuit package for semiconductior devices with improved...

Integrated circuit package for semiconductor devices with improved...

Methods of achieving linear capacitance in symmetrical and asymmetr...

Inverted J-lead for power devices

Semiconductor die package including cup-shaped leadframe

Integrated circuit package for semiconductor devices having a reduc...

Power semiconductor package

Semiconductor assembly with package using cup-shaped lead-frame

Integrated circuit package for semiconductor devices with improved...

Semiconductor die package including cup-shaped leadframe

Method of making trench-gated MOSFET having cesium gate oxide layer

Method of operation of punch-through field effect transistor

Method of forming vertical planar DMOSFET with self-aligned contact

Method of fabricating a field effect transistor

Method of making punch-through field effect transistor

Long channel trench-gated power MOSFET having fully depleted body r...

Trench field effect transistor with reduced punch-through susceptib...

High density trench DMOS transistor with trench bottom implant

Planar DMOS transistor fabricated by a three mask process

Trenched field effect transistor with PN depletion barrier

Field effect Trench transistor having lightly doped epitaxial regio...

Trenched DMOS transistor with lightly doped tub

Method of forming low threshold voltage vertical power transistor u...

Surface mount and flip chip technology with diamond film passivatio...

Surface mount and flip chip technology for total integrated circuit...

Surface mount and flip chip technology for total integrated circuit...

Method of forming a lateral field effect transistor having reduced...

High density trenched DMOS transistor

Trenched DMOS transistor fabrication having thick termination regio...

Patents Applicationslast 30 patents

Integrated circuit package for semiconductior devices with improved...

SEMICONDUCTOR PACKAGING TECHNIQUES

Integrated circuit package for semiconductior devices with improved...

Methods of achieving linear capacitance in symmetrical and asymmetr...

Power semiconductor package

Multiple device package

Integrated circuit package for semiconductor devices with improved...

Inverted J-lead package for power devices

Integrated circuit package for semicoductor devices with improved e...

Semiconductor assembly with package using cup-shaped lead frame

Method of making trench-gated MOSFET having cesium gate oxide layer

METHOD OF OPERATION OF PUNCH-THROUGH FIELD EFFECT TRANSISTOR