Mikhail Anatolievich Sotnikov

Person

Moscow, RU

People

Patents Grantslast 30 patents

Information Patent Grant
Method and control device for circuit layout migration
- Patent number 9,928,331
- Issue date Mar 27, 2018
- NXP USA, INC.
- Vladimir Pavlovich Rozenfeld
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Automatic generation of test layouts for testing a design rule chec...
- Patent number 9,916,412
- Issue date Mar 13, 2018
- NXP USA, INC.
- Mikhail Anatolievich Sotnikov
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method of generating a target layout on the basis of a source layout
- Patent number 9,659,132
- Issue date May 23, 2017
- NXP USA, INC.
- Alexander Leonidovich Kerre
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Cell routability prioritization
- Patent number 8,978,004
- Issue date Mar 10, 2015
- FREESCALE SEMICONDUCTOR, INC.
- Robert L. Maziasz
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for constraint graph based layout compaction f...
- Patent number 7,086,027
- Issue date Aug 1, 2006
- FREESCALE SEMICONDUCTOR, INC.
- Venkata K. R. Chiluvuri
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method for channel routing, and apparatus
- Patent number 6,564,366
- Issue date May 13, 2003
- Motorola, Inc.
- Alexander M. Marchenko
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for channel-routing of an electronic device
- Patent number 6,477,692
- Issue date Nov 5, 2002
- Motorola, Inc.
- Alexander Marchenko
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for constraint graph based layout compaction f...
- Patent number 6,434,721
- Issue date Aug 13, 2002
- Motorola, Inc.
- Venkata K. R. Chiluvuri
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
METHOD OF GENERATING A TARGET LAYOUT ON THE BASIS OF A SOURCE LAYOUT
- Publication number 20160103940
- Publication date Apr 14, 2016
- FREESCALE SEMICONDUCTOR, INC.
- ALEXANDER LEONIDOVICH KERRE
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
AUTOMATIC GENERATION OF TEST LAYOUTS FOR TESTING A DESIGN RULE CHEC...
- Publication number 20160048629
- Publication date Feb 18, 2016
- FREESCALE SEMICONDUCTOR, INC.
- MIKHAIL ANATOLIEVICH SOTNIKOV
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND CONTROL DEVICE FOR CIRCUIT LAYOUT MIGRATION
- Publication number 20150356224
- Publication date Dec 10, 2015
- FREESCALE SEMICONDUCTOR, INC.
- VLADIMIR PAVLOVICH ROZENFELD
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CELL ROUTABILITY PRIORITIZATION
- Publication number 20130212549
- Publication date Aug 15, 2013
- FREESCALE SEMICONDUCTOR, INC.
- Robert L. Maziasz
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Circuit layout compaction using reshaping
- Publication number 20070143716
- Publication date Jun 21, 2007
- Robert Lee Maziasz
- G06 - COMPUTING CALCULATING COUNTING

Mikhail Anatolievich Sotnikov

Person

Patents Grantslast 30 patents

Method and control device for circuit layout migration

Automatic generation of test layouts for testing a design rule chec...

Method of generating a target layout on the basis of a source layout

Cell routability prioritization

Method and apparatus for constraint graph based layout compaction f...

Method for channel routing, and apparatus

Method and apparatus for channel-routing of an electronic device

Method and apparatus for constraint graph based layout compaction f...

Patents Applicationslast 30 patents

METHOD OF GENERATING A TARGET LAYOUT ON THE BASIS OF A SOURCE LAYOUT

AUTOMATIC GENERATION OF TEST LAYOUTS FOR TESTING A DESIGN RULE CHEC...

METHOD AND CONTROL DEVICE FOR CIRCUIT LAYOUT MIGRATION

CELL ROUTABILITY PRIORITIZATION

Circuit layout compaction using reshaping