Ming Kwan

Person

San Leandro, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
NAND memory cell string having a stacked select gate structure and...
- Patent number 11,069,699
- Issue date Jul 20, 2021
- Cypress Semiconductor Corporation
- Ming Sang Kwan
- G11 - INFORMATION STORAGE
Information Patent Grant
NAND memory cell string having a stacked select gate structure and...
- Patent number 10,756,101
- Issue date Aug 25, 2020
- Cypress Semiconductor Corporation
- Ming Sang Kwan
- G11 - INFORMATION STORAGE
Information Patent Grant
NAND memory cell string having a stacked select gate structure and...
- Patent number 10,566,341
- Issue date Feb 18, 2020
- Cypress Semiconductor Corporation
- Ming Sang Kwan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
NAND memory cell string having a stacked select gate structure and...
- Patent number 10,361,215
- Issue date Jul 23, 2019
- Cypress Semiconductor Corporation
- Ming Sang Kwan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Programmable impedance memory device and related methods
- Patent number 10,181,496
- Issue date Jan 15, 2019
- Adesto Technologies Corporation
- Ming Sang Kwan
- G11 - INFORMATION STORAGE
Information Patent Grant
NAND memory cell string having a stacked select gate structure and...
- Patent number 10,038,004
- Issue date Jul 31, 2018
- Cypress Semiconductor Corporation
- Ming Sang Kwan
- G11 - INFORMATION STORAGE
Information Patent Grant
Resistive switching memory having a resistor, diode, and switch mem...
- Patent number 9,530,495
- Issue date Dec 27, 2016
- Adesto Technologies Corporation
- John Dinh
- G11 - INFORMATION STORAGE
Information Patent Grant
Dual program state cycling algorithms for resistive switching memor...
- Patent number 9,524,777
- Issue date Dec 20, 2016
- Adesto Technologies Corporation
- Deepak Kamalanathan
- G11 - INFORMATION STORAGE
Information Patent Grant
Resistive switching memory device architecture for reduced cell dam...
- Patent number 9,437,815
- Issue date Sep 6, 2016
- Adesto Technologies Corporation
- Ming Sang Kwan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Capacitor arrangements using a resistive switching memory cell stru...
- Patent number 9,368,206
- Issue date Jun 14, 2016
- Adesto Technologies Corporation
- John Dinh
- G11 - INFORMATION STORAGE
Information Patent Grant
Barrier region underlying source/drain regions for dual-bit memory...
- Patent number 9,171,936
- Issue date Oct 27, 2015
- Cypress Semiconductor Corporation
- Shankar Sinha
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Controlling AC disturbance while programming
- Patent number 8,559,255
- Issue date Oct 15, 2013
- Spansion LLC
- Sung-Yong Chung
- G11 - INFORMATION STORAGE
Information Patent Grant
Strapping contact for charge protection
- Patent number 8,404,541
- Issue date Mar 26, 2013
- Spansion LLC
- Wei Zheng
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Controlling AC disturbance while programming
- Patent number 8,264,898
- Issue date Sep 11, 2012
- Spansion LLC
- Sung-Yong Chung
- G11 - INFORMATION STORAGE
Information Patent Grant
Controlling AC disturbance while programming
- Patent number 7,986,562
- Issue date Jul 26, 2011
- Spansion LLC
- Sung-Yong Chung
- G11 - INFORMATION STORAGE
Information Patent Grant
Thin oxide dummy tiling as charge protection
- Patent number 7,977,218
- Issue date Jul 12, 2011
- Spansion LLC
- Cinti Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Using thick spacer for bitline implant then remove
- Patent number 7,888,218
- Issue date Feb 15, 2011
- Spansion LLC
- Zhizheng Liu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Strapping contact for charge protection
- Patent number 7,750,407
- Issue date Jul 6, 2010
- Spansion LLC
- Wei Zheng
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Variable salicide block for resistance equalization in an array
- Patent number 7,713,875
- Issue date May 11, 2010
- Spansion LLC
- Michael Brennan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Controlling AC disturbance while programming
- Patent number 7,679,967
- Issue date Mar 16, 2010
- Spansion LLC
- Sung-Yong Chung
- G11 - INFORMATION STORAGE
Information Patent Grant
Deep bitline implant to avoid program disturb
- Patent number 7,671,405
- Issue date Mar 2, 2010
- Spansion LLC
- Timothy Thurgate
- G11 - INFORMATION STORAGE
Information Patent Grant
Multi-phase wordline erasing for flash memory
- Patent number 7,626,869
- Issue date Dec 1, 2009
- Spansion LLC
- Xuguang Wang
- G11 - INFORMATION STORAGE
Information Patent Grant
Flash memory device having increased over-erase correction efficien...
- Patent number 7,599,228
- Issue date Oct 6, 2009
- Spansion LLC
- Qiang Lu
- G11 - INFORMATION STORAGE
Information Patent Grant
Cycling improvement using higher erase bias
- Patent number 7,561,471
- Issue date Jul 14, 2009
- Spansion LLC
- Sheung-Hee Park
- G11 - INFORMATION STORAGE
Information Patent Grant
Using implanted poly-1 to improve charging protection in dual-poly...
- Patent number 7,553,727
- Issue date Jun 30, 2009
- Spansion LLC
- Ming-Sang Kwan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Repetitive erase verify technique for flash memory devices
- Patent number 7,385,851
- Issue date Jun 10, 2008
- Spansion LLC
- Sheung-Hee Park
- G11 - INFORMATION STORAGE
Information Patent Grant
Ramp gate erase for dual bit flash memory
- Patent number 7,319,615
- Issue date Jan 15, 2008
- Spansion LLC
- Sheung-Hee Park
- G11 - INFORMATION STORAGE
Information Patent Grant
Source side programming
- Patent number 7,154,141
- Issue date Dec 26, 2006
- Hyundai Electronics America
- Hsingya Arthur Wang
- G11 - INFORMATION STORAGE
Information Patent Grant
Methods and systems for reducing erase times in flash memory devices
- Patent number 7,079,424
- Issue date Jul 18, 2006
- Spansion LLC
- Sungchul Lee
- G11 - INFORMATION STORAGE
Information Patent Grant
Flash memory cell programming method and system
- Patent number 6,894,925
- Issue date May 17, 2005
- Advanced Micro Devices, Inc.
- Sheunghee Park
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
NAND MEMORY CELL STRING HAVING A STACKED SELECT GATE STRUCTURE AND...
- Publication number 20210082927
- Publication date Mar 18, 2021
- CYPRESS SEMICONDUCTOR CORPORATION
- Ming Sang Kwan
- G11 - INFORMATION STORAGE
Information Patent Application
NAND MEMORY CELL STRING HAVING A STACKED SELECT GATE STRUCTURE AND...
- Publication number 20200168618
- Publication date May 28, 2020
- CYPRESS SEMICONDUCTOR CORPORATION
- Ming Sang Kwan
- G11 - INFORMATION STORAGE
Information Patent Application
NAND MEMORY CELL STRING HAVING A STACKED SELECT GATE STRUCTURE AND...
- Publication number 20190326303
- Publication date Oct 24, 2019
- CYPRESS SEMICONDUCTOR CORPORATION
- Ming Sang Kwan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
NAND MEMORY CELL STRING HAVING A STACKED SELECT GATE STRUCTURE AND...
- Publication number 20180366473
- Publication date Dec 20, 2018
- CYPRESS SEMICONDUCTOR CORPORATION
- Ming Sang Kwan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
NAND MEMORY CELL STRING HAVING A STACKED SELECT GATE STRUCTURE AND...
- Publication number 20170018555
- Publication date Jan 19, 2017
- CYPRESS SEMICONDUCTOR CORPORATION
- Ming Sang Kwan
- G11 - INFORMATION STORAGE
Information Patent Application
CONTROLLING AC DISTURBANCE WHILE PROGRAMMING
- Publication number 20120294103
- Publication date Nov 22, 2012
- SPANSION LLC
- Sung-Yong Chung
- G11 - INFORMATION STORAGE
Information Patent Application
CONTROLLING AC DISTURBANCE WHILE PROGRAMMING
- Publication number 20110235412
- Publication date Sep 29, 2011
- SPANSION LLC
- Sung-Yong Chung
- G11 - INFORMATION STORAGE
Information Patent Application
NAND MEMORY CELL STRING HAVING A STACKED SELECT GATE STRUCTURE AND...
- Publication number 20100322006
- Publication date Dec 23, 2010
- Ming Sang Kwan
- G11 - INFORMATION STORAGE
Information Patent Application
STRAPPING CONTACT FOR CHARGE PROTECTION
- Publication number 20100240210
- Publication date Sep 23, 2010
- SPANSION LLC
- Wei ZHENG
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CONTROLLING AC DISTURBANCE WHILE PROGRAMMING
- Publication number 20100103732
- Publication date Apr 29, 2010
- SPANSION LLC
- Sung-Yong Chung
- G11 - INFORMATION STORAGE
Information Patent Application
CONTROLLING AC DISTURBANCE WHILE PROGRAMMING
- Publication number 20090161462
- Publication date Jun 25, 2009
- SPANSION LLC
- Sung-Yong Chung
- G11 - INFORMATION STORAGE
Information Patent Application
MULTI-PHASE WORDLINE ERASING FOR FLASH MEMORY
- Publication number 20080279014
- Publication date Nov 13, 2008
- SPANSION LLC
- Xuguang Wang
- G11 - INFORMATION STORAGE
Information Patent Application
Cycling improvement using higher erase bias
- Publication number 20080151644
- Publication date Jun 26, 2008
- Spansion LLC
- Sheung-Hee Park
- G11 - INFORMATION STORAGE
Information Patent Application
Using thick spacer for bitline implant then remove
- Publication number 20080153223
- Publication date Jun 26, 2008
- Spansion LLC
- Zhizheng Liu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Thin oxide dummy tiling as charge protection
- Publication number 20080153269
- Publication date Jun 26, 2008
- Cinti Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
REPETITIVE ERASE VERIFY TECHNIQUE FOR FLASH MEMORY DEVICES
- Publication number 20080151636
- Publication date Jun 26, 2008
- Sheung-Hee Park
- G11 - INFORMATION STORAGE
Information Patent Application
Deep bitline implant to avoid program disturb
- Publication number 20080153274
- Publication date Jun 26, 2008
- Timothy Thurgate
- G11 - INFORMATION STORAGE
Information Patent Application
VARIABLE SALICIDE BLOCK FOR RESISTANCE EQUALIZATION IN AN ARRAY
- Publication number 20080150007
- Publication date Jun 26, 2008
- Michael Brennan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Using implanted poly-1 to improve charging protection in dual-poly...
- Publication number 20080150006
- Publication date Jun 26, 2008
- Spansion LLC
- Ming-Sang Kwan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
STRAPPING CONTACT FOR CHARGE PROTECTION
- Publication number 20080142889
- Publication date Jun 19, 2008
- SPANSION LLC
- Wei ZHENG
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Barrier region for memory devices
- Publication number 20080135902
- Publication date Jun 12, 2008
- Spansion LLC
- Shankar Sinha
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
RAMP GATE ERASE FOR DUAL BIT FLASH MEMORY
- Publication number 20080037330
- Publication date Feb 14, 2008
- Spansion LLC
- Sheung-Hee Park
- G11 - INFORMATION STORAGE
Information Patent Application
Source side programming
- Publication number 20020105036
- Publication date Aug 8, 2002
- Hsingya Arthur Wang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Triple well flash memory cell and fabrication process
- Publication number 20020048192
- Publication date Apr 25, 2002
- Hsingya Arthur Wang
- H01 - BASIC ELECTRIC ELEMENTS

Person

Patents Grantslast 30 patents

NAND memory cell string having a stacked select gate structure and...

NAND memory cell string having a stacked select gate structure and...

NAND memory cell string having a stacked select gate structure and...

NAND memory cell string having a stacked select gate structure and...

Programmable impedance memory device and related methods

NAND memory cell string having a stacked select gate structure and...

Resistive switching memory having a resistor, diode, and switch mem...

Dual program state cycling algorithms for resistive switching memor...

Resistive switching memory device architecture for reduced cell dam...

Capacitor arrangements using a resistive switching memory cell stru...

Barrier region underlying source/drain regions for dual-bit memory...

Controlling AC disturbance while programming

Strapping contact for charge protection

Controlling AC disturbance while programming

Controlling AC disturbance while programming

Thin oxide dummy tiling as charge protection

Using thick spacer for bitline implant then remove

Strapping contact for charge protection

Variable salicide block for resistance equalization in an array

Controlling AC disturbance while programming

Deep bitline implant to avoid program disturb

Multi-phase wordline erasing for flash memory

Flash memory device having increased over-erase correction efficien...

Cycling improvement using higher erase bias

Using implanted poly-1 to improve charging protection in dual-poly...

Repetitive erase verify technique for flash memory devices

Ramp gate erase for dual bit flash memory

Source side programming

Methods and systems for reducing erase times in flash memory devices

Flash memory cell programming method and system

Patents Applicationslast 30 patents

NAND MEMORY CELL STRING HAVING A STACKED SELECT GATE STRUCTURE AND...

NAND MEMORY CELL STRING HAVING A STACKED SELECT GATE STRUCTURE AND...

NAND MEMORY CELL STRING HAVING A STACKED SELECT GATE STRUCTURE AND...

NAND MEMORY CELL STRING HAVING A STACKED SELECT GATE STRUCTURE AND...

NAND MEMORY CELL STRING HAVING A STACKED SELECT GATE STRUCTURE AND...

CONTROLLING AC DISTURBANCE WHILE PROGRAMMING

CONTROLLING AC DISTURBANCE WHILE PROGRAMMING

NAND MEMORY CELL STRING HAVING A STACKED SELECT GATE STRUCTURE AND...

STRAPPING CONTACT FOR CHARGE PROTECTION

CONTROLLING AC DISTURBANCE WHILE PROGRAMMING

CONTROLLING AC DISTURBANCE WHILE PROGRAMMING

MULTI-PHASE WORDLINE ERASING FOR FLASH MEMORY

Cycling improvement using higher erase bias

Using thick spacer for bitline implant then remove

Thin oxide dummy tiling as charge protection

REPETITIVE ERASE VERIFY TECHNIQUE FOR FLASH MEMORY DEVICES

Deep bitline implant to avoid program disturb

VARIABLE SALICIDE BLOCK FOR RESISTANCE EQUALIZATION IN AN ARRAY

Using implanted poly-1 to improve charging protection in dual-poly...

STRAPPING CONTACT FOR CHARGE PROTECTION

Barrier region for memory devices

RAMP GATE ERASE FOR DUAL BIT FLASH MEMORY

Source side programming

Triple well flash memory cell and fabrication process