Nicholas V. LiCausi

Person

Watervliet, NY, US

People

Patents Grantslast 30 patents

Information Patent Grant
Metal on metal multiple patterning
- Patent number 11,398,378
- Issue date Jul 26, 2022
- GLOBALFOUNDRIES Inc.
- Hsueh-Chung Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods of forming a conductive contact structure to an embedded me...
- Patent number 11,158,574
- Issue date Oct 26, 2021
- GLOBALFOUNDRIES U.S. INC.
- Nicholas LiCausi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods of forming a conductive contact structure to an embedded me...
- Patent number 11,121,087
- Issue date Sep 14, 2021
- GLOBALFOUNDRIES U.S. INC.
- Nicholas LiCausi
- G11 - INFORMATION STORAGE
Information Patent Grant
Interconnect structures with airgaps arranged between capped interc...
- Patent number 11,101,169
- Issue date Aug 24, 2021
- GLOBALFOUNDRIES U.S. INC.
- Nicholas V. LiCausi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Skip via for metal interconnects
- Patent number 10,978,388
- Issue date Apr 13, 2021
- International Business Machines Corporation
- Hari Prasad Amanapu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Interconnect structure having reduced resistance variation and meth...
- Patent number 10,832,944
- Issue date Nov 10, 2020
- GLOBALFOUNDRIES Inc.
- Nicholas V. LiCausi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Metal on metal multiple patterning
- Patent number 10,818,494
- Issue date Oct 27, 2020
- GLOBALFOUNDRIES Inc.
- Hsueh-Chung Chen
- Y10 - TECHNICAL SUBJECTS COVERED BY FORMER USPC
Information Patent Grant
Line end structures for semiconductor devices
- Patent number 10,770,392
- Issue date Sep 8, 2020
- GLOBALFOUNDRIES Inc.
- Nicholas V. Licausi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Interconnect structures with airgaps and dielectric-capped intercon...
- Patent number 10,707,119
- Issue date Jul 7, 2020
- GLOBALFOUNDRIES Inc.
- Nicholas V. LiCausi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Structure, method and system for measuring RIE lag depth
- Patent number 10,677,855
- Issue date Jun 9, 2020
- GLOBALFOUNDRIES Inc.
- Nicholas V. LiCausi
- G01 - MEASURING TESTING
Information Patent Grant
Methods of identifying space within integrated circuit structure as...
- Patent number 10,622,266
- Issue date Apr 14, 2020
- GLOBALFOUNDRIES Inc.
- Erik A. Verduijn
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Interconnects formed by a metal displacement reaction
- Patent number 10,580,696
- Issue date Mar 3, 2020
- GLOBALFOUNDRIES Inc.
- Sean Xuan Lin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Via and skip via structures
- Patent number 10,485,111
- Issue date Nov 19, 2019
- GLOBALFOUNDRIES Inc.
- Shao Beng Law
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Self aligned buried power rail
- Patent number 10,475,692
- Issue date Nov 12, 2019
- GLOBALFOUNDRIES Inc.
- Nicholas V. Licausi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Fully aligned via in ground rule region
- Patent number 10,366,919
- Issue date Jul 30, 2019
- GLOBALFOUNDRIES Inc.
- Nicholas V. Licausi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of forming complementary nano-sheet/wire transistor devices...
- Patent number 10,304,833
- Issue date May 28, 2019
- GLOBALFOUNDRIES Inc.
- Puneet Harischandra Suvarna
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Interconnects formed by a metal replacement process
- Patent number 10,283,372
- Issue date May 7, 2019
- GLOBALFOUNDRIES Inc.
- Sean Xuan Lin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods of forming an air gap adjacent a gate of a transistor and a...
- Patent number 10,211,100
- Issue date Feb 19, 2019
- GLOBALFOUNDRIES Inc.
- Ruilong Xie
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Via and skip via structures
- Patent number 10,199,261
- Issue date Feb 5, 2019
- GLOBALFOUNDRIES Inc.
- James McMahon
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for manufacturing fully aligned via structures having relaxe...
- Patent number 10,177,028
- Issue date Jan 8, 2019
- GLOBALFOUNDRIES Inc.
- Nicholas V. LiCausi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Non-mandrel cut formation
- Patent number 10,163,633
- Issue date Dec 25, 2018
- GLOBALFOUNDRIES Inc.
- Shao Beng Law
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Metallization levels and methods of making thereof
- Patent number 10,134,580
- Issue date Nov 20, 2018
- GLOBALFOUNDRIES Inc.
- Nicholas V. LiCausi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Etch profile control during skip via formation
- Patent number 10,109,526
- Issue date Oct 23, 2018
- GLOBALFOUNDRIES Inc.
- Xunyuan Zhang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Interconnection lines having variable widths and partially self-ali...
- Patent number 10,083,858
- Issue date Sep 25, 2018
- GLOBALFOUNDRIES Inc.
- Nicholas Vincent Licausi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Apparatus and method for forming interconnection lines having varia...
- Patent number 10,043,703
- Issue date Aug 7, 2018
- GLOBALFOUNDRIES Inc.
- Guillaume Bouche
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Devices and methods of forming asymmetric line/space with barrierle...
- Patent number 10,008,408
- Issue date Jun 26, 2018
- GLOBALFOUNDRIES Inc.
- Errol Todd Ryan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Interconnection cells having variable width metal lines and fully-s...
- Patent number 10,002,786
- Issue date Jun 19, 2018
- GLOBALFOUNDRIES Inc.
- Nicholas Vincent Licausi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Interconnection lines having variable widths and partially self-ali...
- Patent number 9,887,127
- Issue date Feb 6, 2018
- GLOBALFOUNDRIES Inc.
- Nicholas Vincent Licausi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Interconnection cells having variable width metal lines and fully-s...
- Patent number 9,812,351
- Issue date Nov 7, 2017
- GLOBALFOUNDRIES Inc.
- Nicholas Vincent Licausi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Combined SADP fins for semiconductor devices and methods of making...
- Patent number 9,691,775
- Issue date Jun 27, 2017
- GLOBALFOUNDRIES Inc.
- Nicholas Vincent Licausi
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
METHODS OF FORMING A CONDUCTIVE CONTACT STRUCTURE TO AN EMBEDDED ME...
- Publication number 20210193573
- Publication date Jun 24, 2021
- GLOBALFOUNDRIES U.S. Inc.
- Nicholas LiCausi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHODS OF FORMING A CONDUCTIVE CONTACT STRUCTURE TO AN EMBEDDED ME...
- Publication number 20210193584
- Publication date Jun 24, 2021
- GLOBALFOUNDRIES U.S. Inc.
- Nicholas LiCausi
- G11 - INFORMATION STORAGE
Information Patent Application
METAL ON METAL MULTIPLE PATTERNING
- Publication number 20210005454
- Publication date Jan 7, 2021
- GLOBALFOUNDRIES INC.
- Hsueh-Chung CHEN
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTERCONNECT STRUCTURES WITH AIRGAPS ARRANGED BETWEEN CAPPED INTERC...
- Publication number 20200227307
- Publication date Jul 16, 2020
- GLOBALFOUNDRIES INC.
- Nicholas V. LiCausi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTERCONNECT STRUCTURES WITH AIRGAPS AND DIELECTRIC-CAPPED INTERCON...
- Publication number 20200227308
- Publication date Jul 16, 2020
- GLOBALFOUNDRIES INC.
- Nicholas V. LiCausi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTERCONNECT STRUCTURE HAVING REDUCED RESISTANCE VARIATION AND METH...
- Publication number 20200144106
- Publication date May 7, 2020
- GLOBALFOUNDRIES INC.
- Nicholas V. LiCausi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SKIP VIA FOR METAL INTERCONNECTS
- Publication number 20200111736
- Publication date Apr 9, 2020
- International Business Machines Corporation
- Hari Prasad Amanapu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METAL ON METAL MULTIPLE PATTERNING
- Publication number 20200083043
- Publication date Mar 12, 2020
- GLOBALFOUNDRIES INC.
- Hsueh-Chung CHEN
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTERCONNECTS FORMED BY A METAL DISPLACEMENT REACTION
- Publication number 20200066585
- Publication date Feb 27, 2020
- GLOBALFOUNDRIES INC.
- Sean Xuan Lin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SELF ALIGNED BURIED POWER RAIL
- Publication number 20200006112
- Publication date Jan 2, 2020
- GLOBALFOUNDRIES INC.
- Nicholas V. LICAUSI
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
FULLY ALIGNED VIA IN GROUND RULE REGION
- Publication number 20190311948
- Publication date Oct 10, 2019
- GLOBALFOUNDRIES INC.
- Nicholas V. LICAUSI
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
BACK-END-OF-LINE STRUCTURES WITH AIR GAPS
- Publication number 20190206718
- Publication date Jul 4, 2019
- GLOBALFOUNDRIES INC.
- Nicholas V. LiCausi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTERCONNECTS FORMED BY A METAL REPLACEMENT PROCESS
- Publication number 20190088500
- Publication date Mar 21, 2019
- GLOBALFOUNDRIES INC.
- Sean Xuan Lin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
FULLY ALIGNED VIA IN GROUND RULE REGION
- Publication number 20190088541
- Publication date Mar 21, 2019
- GLOBALFOUNDRIES Inc.
- Nicholas V. LICAUSI
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
STRUCTURE, METHOD AND SYSTEM FOR MEASURING RIE LAG DEPTH
- Publication number 20190079128
- Publication date Mar 14, 2019
- GLOBALFOUNDRIES INC.
- Nicholas V. LiCausi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
VIA AND SKIP VIA STRUCTURES
- Publication number 20190027401
- Publication date Jan 24, 2019
- GLOBALFOUNDRIES INC.
- James McMahon
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
VIA AND SKIP VIA STRUCTURES
- Publication number 20190021176
- Publication date Jan 17, 2019
- GLOBALFOUNDRIES INC.
- Shao Beng Law
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
METHOD FOR MANUFACTURING FULLY ALIGNED VIA STRUCTURES HAVING RELAXE...
- Publication number 20190013236
- Publication date Jan 10, 2019
- GLOBALFOUNDRIES INC.
- Nicholas V. LiCausi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTERCONNECTS FORMED WITH STRUCTURALLY-MODIFIED CAPS
- Publication number 20190013240
- Publication date Jan 10, 2019
- GLOBALFOUNDRIES INC.
- Nicholas V. LiCausi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SELF ALIGNED BURIED POWER RAIL
- Publication number 20180294267
- Publication date Oct 11, 2018
- GLOBALFOUNDRIES INC.
- Nicholas V. LICAUSI
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHODS OF IDENTIFYING SPACE WITHIN INTEGRATED CIRCUIT STRUCTURE AS...
- Publication number 20180286681
- Publication date Oct 4, 2018
- GLOBALFOUNDRIES INC.
- Erik A. Verduijn
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHODS OF FORMING AN AIR GAP ADJACENT A GATE OF A TRANSISTOR AND A...
- Publication number 20180277430
- Publication date Sep 27, 2018
- GLOBALFOUNDRIES INC.
- Ruilong Xie
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
NON-MANDREL CUT FORMATION
- Publication number 20180261457
- Publication date Sep 13, 2018
- GLOBALFOUNDRIES INC.
- Shao Beng Law
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTERCONNECTION CELLS HAVING VARIABLE WIDTH METAL LINES AND FULLY-S...
- Publication number 20180174895
- Publication date Jun 21, 2018
- GLOBALFOUNDRIES INC.
- Nicholas Vincent LICAUSI
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTERCONNECTION LINES HAVING VARIABLE WIDTHS AND PARTIALLY SELF-ALI...
- Publication number 20180174896
- Publication date Jun 21, 2018
- GLOBALFOUNDRIES INC.
- Nicholas Vincent LICAUSI
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
APPARATUS AND METHOD FOR FORMING INTERCONNECTION LINES HAVING VARIA...
- Publication number 20180174894
- Publication date Jun 21, 2018
- GLOBALFOUNDRIES Inc.
- Guillaume BOUCHE
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DEVICES AND METHODS OF FORMING ASYMMETRIC LINE/SPACE WITH BARRIERLE...
- Publication number 20170365509
- Publication date Dec 21, 2017
- GLOBALFOUNDRIES INC.
- Errol Todd RYAN
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR IMPROVED FIN PROFILE
- Publication number 20170033224
- Publication date Feb 2, 2017
- GLOBALFOUNDRIES INC.
- Nicholas Vincent LICAUSI
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD TO PROTECT MOL METALLIZATION FROM HARDMASK STRIP PROCESS
- Publication number 20160379872
- Publication date Dec 29, 2016
- GLOBALFOUNDRIES INC.
- Vimal KAMINENI
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
FINFET DEVICE WITH A SUBSTANTIALLY SELF-ALIGNED ISOLATION REGION PO...
- Publication number 20160190306
- Publication date Jun 30, 2016
- GLOBALFOUNDRIES INC.
- Ruilong Xie
- H01 - BASIC ELECTRIC ELEMENTS

Nicholas V. LiCausi

Person

Patents Grantslast 30 patents

Metal on metal multiple patterning

Methods of forming a conductive contact structure to an embedded me...

Methods of forming a conductive contact structure to an embedded me...

Interconnect structures with airgaps arranged between capped interc...

Skip via for metal interconnects

Interconnect structure having reduced resistance variation and meth...

Metal on metal multiple patterning

Line end structures for semiconductor devices

Interconnect structures with airgaps and dielectric-capped intercon...

Structure, method and system for measuring RIE lag depth

Methods of identifying space within integrated circuit structure as...

Interconnects formed by a metal displacement reaction

Via and skip via structures

Self aligned buried power rail

Fully aligned via in ground rule region

Method of forming complementary nano-sheet/wire transistor devices...

Interconnects formed by a metal replacement process

Methods of forming an air gap adjacent a gate of a transistor and a...

Via and skip via structures

Method for manufacturing fully aligned via structures having relaxe...

Non-mandrel cut formation

Metallization levels and methods of making thereof

Etch profile control during skip via formation

Interconnection lines having variable widths and partially self-ali...

Apparatus and method for forming interconnection lines having varia...

Devices and methods of forming asymmetric line/space with barrierle...

Interconnection cells having variable width metal lines and fully-s...

Interconnection lines having variable widths and partially self-ali...

Interconnection cells having variable width metal lines and fully-s...

Combined SADP fins for semiconductor devices and methods of making...

Patents Applicationslast 30 patents

METHODS OF FORMING A CONDUCTIVE CONTACT STRUCTURE TO AN EMBEDDED ME...

METHODS OF FORMING A CONDUCTIVE CONTACT STRUCTURE TO AN EMBEDDED ME...

METAL ON METAL MULTIPLE PATTERNING

INTERCONNECT STRUCTURES WITH AIRGAPS ARRANGED BETWEEN CAPPED INTERC...

INTERCONNECT STRUCTURES WITH AIRGAPS AND DIELECTRIC-CAPPED INTERCON...

INTERCONNECT STRUCTURE HAVING REDUCED RESISTANCE VARIATION AND METH...

SKIP VIA FOR METAL INTERCONNECTS

METAL ON METAL MULTIPLE PATTERNING

INTERCONNECTS FORMED BY A METAL DISPLACEMENT REACTION

SELF ALIGNED BURIED POWER RAIL

FULLY ALIGNED VIA IN GROUND RULE REGION

BACK-END-OF-LINE STRUCTURES WITH AIR GAPS

INTERCONNECTS FORMED BY A METAL REPLACEMENT PROCESS

FULLY ALIGNED VIA IN GROUND RULE REGION

STRUCTURE, METHOD AND SYSTEM FOR MEASURING RIE LAG DEPTH

VIA AND SKIP VIA STRUCTURES

VIA AND SKIP VIA STRUCTURES

METHOD FOR MANUFACTURING FULLY ALIGNED VIA STRUCTURES HAVING RELAXE...

INTERCONNECTS FORMED WITH STRUCTURALLY-MODIFIED CAPS

SELF ALIGNED BURIED POWER RAIL

METHODS OF IDENTIFYING SPACE WITHIN INTEGRATED CIRCUIT STRUCTURE AS...

METHODS OF FORMING AN AIR GAP ADJACENT A GATE OF A TRANSISTOR AND A...

NON-MANDREL CUT FORMATION

INTERCONNECTION CELLS HAVING VARIABLE WIDTH METAL LINES AND FULLY-S...

INTERCONNECTION LINES HAVING VARIABLE WIDTHS AND PARTIALLY SELF-ALI...

APPARATUS AND METHOD FOR FORMING INTERCONNECTION LINES HAVING VARIA...

DEVICES AND METHODS OF FORMING ASYMMETRIC LINE/SPACE WITH BARRIERLE...

METHOD FOR IMPROVED FIN PROFILE

METHOD TO PROTECT MOL METALLIZATION FROM HARDMASK STRIP PROCESS

FINFET DEVICE WITH A SUBSTANTIALLY SELF-ALIGNED ISOLATION REGION PO...