Nishant Lakhera

Person

Austin, TX, US

People

Patents Grantslast 30 patents

Information Patent Grant
Packaged semiconductor device assembly
- Patent number 11,908,784
- Issue date Feb 20, 2024
- NXP USA, INC.
- Akhilesh Kumar Singh
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Package with conductive underfill ground plane
- Patent number 11,270,972
- Issue date Mar 8, 2022
- NXP B.V.
- Nishant Lakhera
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Hybrid package
- Patent number 11,189,557
- Issue date Nov 30, 2021
- NXP USA, INC.
- Akhilesh Kumar Singh
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Package with support structure
- Patent number 10,431,534
- Issue date Oct 1, 2019
- NXP USA, INC.
- Nishant Lakhera
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Die attachment for packaged semiconductor device
- Patent number 10,217,698
- Issue date Feb 26, 2019
- NXP USA, INC.
- Akhilesh K. Singh
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Apparatus and methods for multi-die packaging
- Patent number 10,211,184
- Issue date Feb 19, 2019
- NXP USA, INC.
- Nishant Lakhera
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Wafer level chip scale package with encapsulant
- Patent number 10,147,645
- Issue date Dec 4, 2018
- NXP USA, INC.
- Navas Khan Oratti Kalandar
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Structure and method to minimize warpage of packaged semiconductor...
- Patent number 9,978,614
- Issue date May 22, 2018
- NXP USA, INC.
- Nishant Lakhera
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Electronic component package with heatsink and multiple electronic...
- Patent number 9,953,904
- Issue date Apr 24, 2018
- NXP USA, INC.
- Navas Khan Oratti Kalandar
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Packaged semiconductor device having bent leads and method for forming
- Patent number 9,947,614
- Issue date Apr 17, 2018
- NXP USA, INC.
- Navas Khan Oratti Kalandar
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for packaging an integrated circuit device with stress buffer
- Patent number 9,691,637
- Issue date Jun 27, 2017
- NXP USA, INC.
- Navas Khan Oratti Kalandar
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Die attachment for packaged semiconductor device
- Patent number 9,559,077
- Issue date Jan 31, 2017
- NXP USA, INC.
- Akhilesh K. Singh
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Apparatus and methods for stackable packaging
- Patent number 9,508,632
- Issue date Nov 29, 2016
- FREESCALE SEMICONDUCTOR, INC.
- Navas Khan Oratti Kalandar
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
PACKAGED SEMICONDUCTOR DEVICE ASSEMBLY
- Publication number 20220093499
- Publication date Mar 24, 2022
- NXP USA, Inc.
- Akhilesh Kumar Singh
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PACKAGE WITH CONDUCTIVE UNDERFILL GROUND PLANE
- Publication number 20200395332
- Publication date Dec 17, 2020
- NXP USA, Inc.
- Nishant Lakhera
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
HYBRID PACKAGE
- Publication number 20200185319
- Publication date Jun 11, 2020
- NXP USA, Inc.
- Akhilesh Kumar Singh
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
HYBRID PACKAGE
- Publication number 20200013711
- Publication date Jan 9, 2020
- NXP USA, Inc.
- Akhilesh Kumar Singh
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PACKAGE WITH SUPPORT STRUCTURE
- Publication number 20190181079
- Publication date Jun 13, 2019
- NXP USA, Inc.
- Nishant Lakhera
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PACKAGE WITH ISOLATION STRUCTURE
- Publication number 20190157222
- Publication date May 23, 2019
- NXP USA, Inc.
- Nishant LAKHERA
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SELECTIVELY SHIELDED SEMICONDUCTOR PACKAGE
- Publication number 20190103365
- Publication date Apr 4, 2019
- NXP USA, Inc.
- Akhilesh Kumar SINGH
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
ELECTRONIC COMPONENT PACKAGE WITH HEATSINK AND MULTIPLE ELECTRONIC...
- Publication number 20180114745
- Publication date Apr 26, 2018
- FREESCALE SEMICONDUCTOR, INC.
- Navas Khan Oratti Kalandar
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
STACKABLE MOLDED PACKAGES AND METHODS OF MANUFACTURE THEREOF
- Publication number 20180053753
- Publication date Feb 22, 2018
- FREESCALE SEMICONDUCTOR, INC.
- Akhilesh Kumar Singh
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
APPARATUS AND METHODS FOR MULTI-DIE PACKAGING
- Publication number 20180053749
- Publication date Feb 22, 2018
- NXP USA, Inc.
- Nishant LAKHERA
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Apparatus and Methods for Multi-Die Packaging
- Publication number 20170278825
- Publication date Sep 28, 2017
- FREESCALE SEMICONDUCTOR, INC.
- NISHANT LAKHERA
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PACKAGED SEMICONDUCTOR DEVICE HAVING BENT LEADS AND METHOD FOR FORMING
- Publication number 20170263538
- Publication date Sep 14, 2017
- FREESCALE SEMICONDUCTOR, INC.
- Navas Khan ORATTI KALANDAR
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR PACKAGING AN INTEGRATED CIRCUIT DEVICE WITH STRESS BUFFER
- Publication number 20170103905
- Publication date Apr 13, 2017
- FREESCALE SEMICONDUCTOR, INC.
- NAVAS KHAN ORATTI KALANDAR
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DIE ATTACHMENT FOR PACKAGED SEMICONDUCTOR DEVICE
- Publication number 20170098597
- Publication date Apr 6, 2017
- NXP USA, Inc.
- AKHILESH K. SINGH
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
WAFER LEVEL CHIP SCALE PACKAGE WITH ENCAPSULANT
- Publication number 20170084491
- Publication date Mar 23, 2017
- FREESCALE SEMICONDUCTOR, INC.
- NAVAS KHAN ORATTI KALANDAR
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
STRUCTURE AND METHOD TO MINIMIZE WARPAGE OF PACKAGED SEMICONDUCTOR...
- Publication number 20160307780
- Publication date Oct 20, 2016
- FREESCALE SEMICONDUCTOR, INC.
- Nishant LAKHERA
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DIE ATTACHMENT FOR PACKAGED SEMICONDUCTOR DEVICE
- Publication number 20160118365
- Publication date Apr 28, 2016
- FREESCALE SEMICONDUCTOR, INC.
- AKHILESH K. SINGH
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
STRUCTURE AND METHOD TO MINIMIZE WARPAGE OF PACKAGED SEMICONDUCTOR...
- Publication number 20160064299
- Publication date Mar 3, 2016
- NISHANT LAKHERA
- H01 - BASIC ELECTRIC ELEMENTS

Nishant Lakhera

Person

Patents Grantslast 30 patents

Packaged semiconductor device assembly

Package with conductive underfill ground plane

Hybrid package

Package with support structure

Die attachment for packaged semiconductor device

Apparatus and methods for multi-die packaging

Wafer level chip scale package with encapsulant

Structure and method to minimize warpage of packaged semiconductor...

Electronic component package with heatsink and multiple electronic...

Packaged semiconductor device having bent leads and method for forming

Method for packaging an integrated circuit device with stress buffer

Die attachment for packaged semiconductor device

Apparatus and methods for stackable packaging

Patents Applicationslast 30 patents

PACKAGED SEMICONDUCTOR DEVICE ASSEMBLY

PACKAGE WITH CONDUCTIVE UNDERFILL GROUND PLANE

HYBRID PACKAGE

HYBRID PACKAGE

PACKAGE WITH SUPPORT STRUCTURE

PACKAGE WITH ISOLATION STRUCTURE

SELECTIVELY SHIELDED SEMICONDUCTOR PACKAGE

ELECTRONIC COMPONENT PACKAGE WITH HEATSINK AND MULTIPLE ELECTRONIC...

STACKABLE MOLDED PACKAGES AND METHODS OF MANUFACTURE THEREOF

APPARATUS AND METHODS FOR MULTI-DIE PACKAGING

Apparatus and Methods for Multi-Die Packaging

PACKAGED SEMICONDUCTOR DEVICE HAVING BENT LEADS AND METHOD FOR FORMING

METHOD FOR PACKAGING AN INTEGRATED CIRCUIT DEVICE WITH STRESS BUFFER

DIE ATTACHMENT FOR PACKAGED SEMICONDUCTOR DEVICE

WAFER LEVEL CHIP SCALE PACKAGE WITH ENCAPSULANT

STRUCTURE AND METHOD TO MINIMIZE WARPAGE OF PACKAGED SEMICONDUCTOR...

DIE ATTACHMENT FOR PACKAGED SEMICONDUCTOR DEVICE

STRUCTURE AND METHOD TO MINIMIZE WARPAGE OF PACKAGED SEMICONDUCTOR...