Noam Familia

Person

Modiin, IL

People

Patents Grantslast 30 patents

Information Patent Grant
Apparatus and method to calibrate clock phase mismatches
- Patent number 12,199,623
- Issue date Jan 14, 2025
- Intel Corporation
- Amit Kumar Srivastava
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
PLL capacitor swap technique and low jitter dynamic Digital Control...
- Patent number 10,944,411
- Issue date Mar 9, 2021
- Intel Corporation
- Mark Elzinga
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Eye width measurement and margining in communication systems
- Patent number 9,917,685
- Issue date Mar 13, 2018
- Intel Corporation
- Dima Hammad
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Digital phase-locked loop supply voltage control
- Patent number 9,866,225
- Issue date Jan 9, 2018
- Intel Corporation
- Noam Familia
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Eye width measurement and margining in communication systems
- Patent number 9,673,966
- Issue date Jun 6, 2017
- Intel Corporation
- Dima Hammad
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Digital phase-locked loop supply voltage control
- Patent number 9,350,365
- Issue date May 24, 2016
- Intel Corporation
- Noam Familia
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Eye width measurement and margining in communication systems
- Patent number 9,215,061
- Issue date Dec 15, 2015
- Intel Corporation
- Dima Hammad
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Apparatus for symmetric and linear time-to-digital converter (TDC)
- Patent number 9,209,820
- Issue date Dec 8, 2015
- Intel Corporation
- Noam Familia
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Eye width measurement and margining in communication systems
- Patent number 8,989,329
- Issue date Mar 24, 2015
- Intel Corporation
- Dima Hammad
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Low noise voltage regulator
- Patent number 7,973,518
- Issue date Jul 5, 2011
- Intel Corporation
- Joseph Shor
- G05 - CONTROLLING REGULATING
Information Patent Grant
Systems and arrangements for operating a phase locked loop
- Patent number 7,564,314
- Issue date Jul 21, 2009
- Intel Corporation
- Noam Familia
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Phase-locked loop with tunable-transfer function
- Patent number 7,310,021
- Issue date Dec 18, 2007
- Intel Corporation
- Noam Familia
- H03 - BASIC ELECTRONIC CIRCUITRY

Patents Applicationslast 30 patents

Information Patent Application
ADAPTIVE CYCLIC DELAY LINE FOR FRACTIONAL-N PLL
- Publication number 20230163766
- Publication date May 25, 2023
- Intel Corporation
- Noam Familia
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
NOTCH FILTER CALIBRATION IN LC OSCILLATORS FOR SUPPLY NOISE REJECTION
- Publication number 20230155549
- Publication date May 18, 2023
- Intel Corporation
- Noam Familia
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
APPARATUS AND METHOD FOR CLOCK PHASE CALIBRATION
- Publication number 20230090369
- Publication date Mar 23, 2023
- Noam Familia
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
APPARATUS AND METHOD TO CALIBRATE CLOCK PHASE MISMATCHES
- Publication number 20220302918
- Publication date Sep 22, 2022
- Intel Corporation
- Amit Kumar Srivastava
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
EYE WIDTH MEASUREMENT AND MARGINING IN COMMUNICATION SYSTEMS
- Publication number 20170279592
- Publication date Sep 28, 2017
- Intel Corporation
- DIMA HAMMAD
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
DIGITAL PHASE-LOCKED LOOP SUPPLY VOLTAGE CONTROL
- Publication number 20160269036
- Publication date Sep 15, 2016
- Intel Corporation
- Noam Familia
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
EYE WIDTH MEASUREMENT AND MARGINING IN COMMUNICATION SYSTEMS
- Publication number 20160211965
- Publication date Jul 21, 2016
- Intel Corporation
- DIMA HAMMAD
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
DIGITAL PHASE-LOCKED LOOP SUPPLY VOLTAGE CONTROL
- Publication number 20160087641
- Publication date Mar 24, 2016
- Intel Corporation
- Noam Familia
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
EYE WIDTH MEASUREMENT AND MARGINING IN COMMUNICATION SYSTEMS
- Publication number 20150200767
- Publication date Jul 16, 2015
- Intel Corporation
- DIMA HAMMAD
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
APPARATUS FOR SYMMETRIC AND LINEAR TIME-TO-DIGITAL CONVERTER (TDC)
- Publication number 20150188553
- Publication date Jul 2, 2015
- Noam FAMILIA
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
EYE WIDTH MEASUREMENT AND MARGINING IN COMMUNICATION SYSTEMS
- Publication number 20140270030
- Publication date Sep 18, 2014
- DIMA HAMMAD
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
LOW NOISE VOLTAGE REGULATOR
- Publication number 20090302812
- Publication date Dec 10, 2009
- Joseph Shor
- G05 - CONTROLLING REGULATING
Information Patent Application
Systems and arrangements for operating a phase locked loop
- Publication number 20080218275
- Publication date Sep 11, 2008
- Noam Familia
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Phase-locked loop with tunable-transfer function
- Publication number 20070152759
- Publication date Jul 5, 2007
- Noam Familia
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Phase interpolator driver
- Publication number 20060279335
- Publication date Dec 14, 2006
- Intel Corporation
- Noam Familia
- H03 - BASIC ELECTRONIC CIRCUITRY

Noam Familia

Person

Patents Grantslast 30 patents

Apparatus and method to calibrate clock phase mismatches

PLL capacitor swap technique and low jitter dynamic Digital Control...

Eye width measurement and margining in communication systems

Digital phase-locked loop supply voltage control

Eye width measurement and margining in communication systems

Digital phase-locked loop supply voltage control

Eye width measurement and margining in communication systems

Apparatus for symmetric and linear time-to-digital converter (TDC)

Eye width measurement and margining in communication systems

Low noise voltage regulator

Systems and arrangements for operating a phase locked loop

Phase-locked loop with tunable-transfer function

Patents Applicationslast 30 patents

ADAPTIVE CYCLIC DELAY LINE FOR FRACTIONAL-N PLL

NOTCH FILTER CALIBRATION IN LC OSCILLATORS FOR SUPPLY NOISE REJECTION

APPARATUS AND METHOD FOR CLOCK PHASE CALIBRATION

APPARATUS AND METHOD TO CALIBRATE CLOCK PHASE MISMATCHES

EYE WIDTH MEASUREMENT AND MARGINING IN COMMUNICATION SYSTEMS

DIGITAL PHASE-LOCKED LOOP SUPPLY VOLTAGE CONTROL

EYE WIDTH MEASUREMENT AND MARGINING IN COMMUNICATION SYSTEMS

DIGITAL PHASE-LOCKED LOOP SUPPLY VOLTAGE CONTROL

EYE WIDTH MEASUREMENT AND MARGINING IN COMMUNICATION SYSTEMS

APPARATUS FOR SYMMETRIC AND LINEAR TIME-TO-DIGITAL CONVERTER (TDC)

EYE WIDTH MEASUREMENT AND MARGINING IN COMMUNICATION SYSTEMS

LOW NOISE VOLTAGE REGULATOR

Systems and arrangements for operating a phase locked loop

Phase-locked loop with tunable-transfer function

Phase interpolator driver