Noboru Nakanishi

Person

Beppu City, JP

People

Patents Grantslast 30 patents

Information Patent Grant
Package with dies mounted on opposing surfaces of a leadframe
- Patent number 11,574,855
- Issue date Feb 7, 2023
- Texas Instruments Incorporated
- Makoto Shibuya
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Package with dies mounted on opposing surfaces of a leadframe
- Patent number 11,088,055
- Issue date Aug 10, 2021
- Texas Instruments Incorporated
- Makoto Shibuya
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit package with sensor and method of making
- Patent number 10,077,186
- Issue date Sep 18, 2018
- Texas Instruments Incorporated
- Makoto Shibuya
- B81 - MICRO-STRUCTURAL TECHNOLOGY
Information Patent Grant
Optoelectronic package
- Patent number 9,899,794
- Issue date Feb 20, 2018
- Texas Instruments Incorporated
- Will Kiang Wong
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit package with sensor and method of making
- Patent number 9,688,530
- Issue date Jun 27, 2017
- Texas Instruments Incorporated
- Makoto Shibuya
- B81 - MICRO-STRUCTURAL TECHNOLOGY
Information Patent Grant
Method for reducing backside die damage during die separation process
- Patent number 8,993,412
- Issue date Mar 31, 2015
- Texas Instruments Incorporated
- Shoichi Iriguchi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Multilayer laser trim interconnect method
- Patent number 6,756,252
- Issue date Jun 29, 2004
- Texas Instrument Incorporated
- Noboru Nakanishi
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
PACKAGE WITH DIES MOUNTED ON OPPOSING SURFACES OF A LEADFRAME
- Publication number 20210375730
- Publication date Dec 2, 2021
- TEXAS INSTRUMENTS INCORPORATED
- Makoto Shibuya
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PACKAGE WITH DIES MOUNTED ON OPPOSING SURFACES OF A LEADFRAME
- Publication number 20200194357
- Publication date Jun 18, 2020
- TEXAS INSTRUMENTS INCORPORATED
- Makoto Shibuya
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Integrated Circuit Package with Sensor and Method of Making
- Publication number 20170253476
- Publication date Sep 7, 2017
- TEXAS INSTRUMENTS INCORPORATED
- Makoto Shibuya
- B81 - MICRO-STRUCTURAL TECHNOLOGY
Information Patent Application
INTEGRATED CIRCUIT PACKAGE WITH SENSOR AND METHOD OF MAKING
- Publication number 20160347607
- Publication date Dec 1, 2016
- TEXAS INSTRUMENTS INCORPORATED
- Makoto Shibuya
- B81 - MICRO-STRUCTURAL TECHNOLOGY
Information Patent Application
SEMICONDUCTOR CAVITY PACKAGE USING PHOTOSENSITIVE RESIN
- Publication number 20160068387
- Publication date Mar 10, 2016
- TEXAS INSTRUMENTS INCORPORATED
- Noboru Nakanishi
- B81 - MICRO-STRUCTURAL TECHNOLOGY
Information Patent Application
OPTOELECTRONIC PACKAGE
- Publication number 20150380895
- Publication date Dec 31, 2015
- TEXAS INSTRUMENTS INCORPORATED
- WILL KIANG WONG
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR DEVICE HAVING REINFORCED WIRE BONDS TO METAL TERMINALS
- Publication number 20140284779
- Publication date Sep 25, 2014
- TEXAS INSTRUMENTS INCORPORATED
- KAZUNORI HAYATA
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method for Mounting Flip Chip and Substrate Used Therein
- Publication number 20100269333
- Publication date Oct 28, 2010
- TEXAS INSTRUMENTS INCORPORATED
- Mutsumi MASUMOTO
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Application
Semiconductor Manufacturing Method
- Publication number 20100255641
- Publication date Oct 7, 2010
- TEXAS INSTRUMENTS INCORPORATED
- Noboru NAKANISHI
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Multilayer laser trim interconnect method
- Publication number 20040173892
- Publication date Sep 9, 2004
- Noboru Nakanishi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Multilayer laser trim interconnect method
- Publication number 20040014309
- Publication date Jan 22, 2004
- TEXAS INSTRUMENTS INCORPORATED
- Noboru Nakanishi
- H01 - BASIC ELECTRIC ELEMENTS

Noboru Nakanishi

Person

Patents Grantslast 30 patents

Package with dies mounted on opposing surfaces of a leadframe

Package with dies mounted on opposing surfaces of a leadframe

Integrated circuit package with sensor and method of making

Optoelectronic package

Integrated circuit package with sensor and method of making

Method for reducing backside die damage during die separation process

Multilayer laser trim interconnect method

Patents Applicationslast 30 patents

PACKAGE WITH DIES MOUNTED ON OPPOSING SURFACES OF A LEADFRAME

PACKAGE WITH DIES MOUNTED ON OPPOSING SURFACES OF A LEADFRAME

Integrated Circuit Package with Sensor and Method of Making

INTEGRATED CIRCUIT PACKAGE WITH SENSOR AND METHOD OF MAKING

SEMICONDUCTOR CAVITY PACKAGE USING PHOTOSENSITIVE RESIN

OPTOELECTRONIC PACKAGE

SEMICONDUCTOR DEVICE HAVING REINFORCED WIRE BONDS TO METAL TERMINALS

Method for Mounting Flip Chip and Substrate Used Therein

Semiconductor Manufacturing Method

Multilayer laser trim interconnect method

Multilayer laser trim interconnect method