Patent Application
20140284779
Disclosed embodiments relate to leadframes for semiconductor devices, and more particularly to wire bonded semiconductor devices.
In the manufacture of semiconductor integrated circuits (ICs), semiconductor IC die (or chips) are commonly mounted on a leadframe, followed by enclosing the IC die and part of the leadframe in a plastic casing to form an IC package. The IC package can be mounted on a printed circuit board (PCB) for interconnection of the electronic devices on the IC die with external circuitry. A leadframe should provide good bondability, molding compound characteristic, and solderability, so that it can facilitate the packaging process. To provide these characteristics, various coatings may be formed on the leadframe surface.
A conventional method for providing improved bondability for the interconnection between bond wires and bonding areas of a leadframe is to electroplate a metal such as silver (Ag) on the bonded areas including on the surface of the metal terminals within the package before wire bonding. Wire bonding is generally performed by a first bonding which forms a ball bond by placing a capillary over the bond pad of the IC die with a ball of the wire extending out of the capillary, and then a second bonding for bonding to the metal terminal. In the second bonding the capillary may be moved to a metal terminal (e.g., lead finger) of the leadframe to which a second bond is made with the wire travelling with respect to the capillary bore, and a stitch bond can be made to the metal terminal (e.g., lead finger) using the capillary with the wire then being broken, leaving a small wire pigtail extending out of the capillary.
Wire bonding can also be used to bond a semiconductor die to a variety of package substrates besides leadframes. For example, other package substrates can include multi-layer printed circuit boards (PCBs), thick film ceramics, glass substrates and flexible circuits.
There can be a problem with weak wire bond connections and resulting instability of the wire bonds to the metal terminals of the package substrate, which can cause electrical instabilities (resulting in high resistance contacts) and mechanical failures (e.g., low pull strength of the bond leading to pulling apart). Conventional solutions to this problem involve changing wire bonding process parameters and/or selecting different bond wire-metal terminal material combinations, including metal plated layers on the top surface of the metal terminals.
Disclosed embodiments recognize weak wire bond connections and resulting instability of the wire bond from bond pads on a semiconductor die to metal terminals on a package substrate which lead to electrical instabilities (resulting in high resistance contacts) and mechanical failures (e.g., low pull strength leading to pulling apart) can be due to a space between a portion of the bonding interface between the bond wires and the metal terminals. Disclosed embodiments solve this problem of weak wire bond connections by reinforcing the wire bond connection by applying a metal paste over the bonding area after wire bonding operations, then sintering the metal paste to form a metal reinforcement material. The reinforcement material strengthens the wire bond connection including by filling spaces present in the bonding interface between the bond wires and the metal terminals after wire bonding, such as spaces due to the scrub motion or ultrasonic forces during the bonding of the bond wires. The reinforcement material enables higher wire bond performance, including improved wire bond ability, pull strength, shear strength and break mode.
Regarding the method, after wirebonding, a metal paste that includes metal particles and a binder is applied, such as by an inkjet or other dispense apparatus. The applied metal paste can penetrate into the space of wire bonding and also cover the bond (e.g., stitch bond). The metal paste is then sintered to remove the binder and form the reinforcement material.
Reference will now be made to the accompanying drawings, which are not necessarily drawn to scale, wherein:
Example embodiments are described with reference to the drawings, wherein like reference numerals are used to designate similar or equivalent elements. Illustrated ordering of acts or events should not be considered as limiting, as some acts or events may occur in different order and/or concurrently with other acts or events. Furthermore, some illustrated acts or events may not be required to implement a methodology in accordance with this disclosure.
Step 101 comprises connecting a bond wire between a bond pad on a top side surface of a semiconductor die having its bottom side surface attached to a package substrate to a bonded area within a metal terminal of the package substrate. In the case the package substrate is a leadframe, the leadframe generally includes a plurality of metal terminals. The top side surface of the semiconductor die is an active surface (e.g., silicon surface) which generally includes a plurality of interconnected devices that include transistors and other circuit elements configured together to provide a circuit function.
In the bonding process, a plurality bond wires, such as gold or aluminum wires, each having one end bonded to a bond pad on the semiconductor die and the other end bonded to the metal terminal are used for the interconnect. Known wire bonding techniques may be used. For example, a stitch bond may be formed along a bonding interface between the bond wire and the bonded area of the metal terminal under bond wire. The bondwire material may comprise a variety of materials, including Au, Cu, or Al. The base metal of the leadframe is generally copper or a copper alloy including Alloy 194, C7025, KCF125, EFTEC, or can be other than copper comprising such as a nickel/ferrite alloy (e.g., Ni—Fe 42 alloy). A typical thickness for the base metal is 0.15 mm to 0.30 mm. The metal terminals can be standard metal terminals (e.g., copper) or be plated metal terminals.
Step 102 comprises applying a metal paste including a plurality of metal particles, and a binder over the bonded area after the connecting/bonding step 101. As used herein, a binder is a material for dispersing the metal particles in the paste, and to enable printing of the metal particles. The binder is generally an organic binder. The binder can be a solvent-binder, or a separate solvent may be added. A computer controlled ink jet apparatus can be used for the applying. Other applying/dispensing apparatus can include computer controlled needle dispensers (air, mechanical) and jet dispensers. These methods all dispense metal particles in metal paste, and can print a paste with high resolution.
In the case of ink-jet printing, the ink-jet printing action can be induced by various technologies known in the art, including piezoelectric or thermal ink jet printers. Ink-jet printing operates via a series of nozzles to shoot small droplets of liquid onto a surface with high precision. The nozzles are part of a print head that can be moved back and forth (e.g., by a stepper motor) with respect to the surface being printed. The surface being printed can also be moved relative to the print head.
The applying provides a paste thickness that can be in a range in thickness after sintering (step 103) of at least 1 μm, typically providing a thickness range between 2 μm and 8 μms. The metal particles in the metal paste can comprise metals particles, such nanoparticles comprising silver, copper, aluminum or gold, or alloys thereof.
Step 103 comprises sintering the metal paste to densify the plurality of metal particles to form a reinforcement material including within a portion of the bonding interface. As known in the art, sintering includes removing the binder and optional solvent if present, such as by heat and/or ultraviolet light.
An example sintering process includes a temperature generally≧100° C., optionally under pressure (e.g., 2 to 10 atmospheres), in a non-oxidizing atmosphere. A reducing gas atmosphere can be used to remove surface metal oxide for metals such as copper and to prevent oxidation. The reducing gas as used herein is a gas or gas mixture capable of generating H* radicals or H+ ions through decomposition or dissociation. The reducing gas can include one or more of hydrazine (N2H4) derivatives, NH3, H2, SiH4 and Si2H6. In one particular embodiment, the reducing gas is a gas mixture, such as forming gas (N2+H2) which is a mixture of H2 and N2 where the respective mole fractions can vary.
In the case the package substrate comprises a leadframe, step 104 comprises encapsulating the semiconductor device in an encapsulating material, such as a polymer. An electrically non-conducting (dielectric) encapsulation polymer can be molded over the package in the encapsulation step. The packaged semiconductor device is then generally electrically tested.
Disclosed embodiments can be integrated into a variety of assembly flows to form a variety of different semiconductor IC devices and related products. The assembly can comprise single semiconductor die or multiple semiconductor die, such as PoP configurations comprising a plurality of stacked semiconductor die. The semiconductor die may include various elements therein and/or layers thereon, including barrier layers, dielectric layers, device structures, active elements and passive elements including source regions, drain regions, bit lines, bases, emitters, collectors, conductive lines, conductive vias, etc. Moreover, the semiconductor die can be formed from a variety of processes including bipolar, CMOS, BiCMOS and MEMS.
Those skilled in the art to which this disclosure relates will appreciate that many other embodiments and variations of embodiments are possible within the scope of the claimed invention, and further additions, deletions, substitutions and modifications may be made to the described embodiments without departing from the scope of this disclosure.
