Nyles CODY

Person

Tempe, AZ, US

People

Patents Grantslast 30 patents

Information Patent Grant
Semiconductor device including superlattice with O18 enriched monol...
- Patent number 12,199,148
- Issue date Jan 14, 2025
- ATOMERA INCORPORATED
- Marek Hytha
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for making a semiconductor superlattices with different non-...
- Patent number 12,191,160
- Issue date Jan 7, 2025
- ATOMERA INCORPORATED
- Keith Doran Weeks
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for making gate-all-around (GAA) device including a superlat...
- Patent number 12,142,641
- Issue date Nov 12, 2024
- ATOMERA INCORPORATED
- Keith Doran Weeks
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for making semiconductor device including superlattice with...
- Patent number 12,119,380
- Issue date Oct 15, 2024
- ATOMERA INCORPORATED
- Keith Doran Weeks
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for making semiconductor device including a superlattice and...
- Patent number 12,046,470
- Issue date Jul 23, 2024
- ATOMERA INCORPORATED
- Marek Hytha
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Gate-all-around (GAA) device including a superlattice
- Patent number 11,978,771
- Issue date May 7, 2024
- ATOMERA INCORPORATED
- Keith Doran Weeks
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device including a superlattice and enriched silicon...
- Patent number 11,923,418
- Issue date Mar 5, 2024
- ATOMERA INCORPORATED
- Marek Hytha
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for making semiconductor device including superlattice with...
- Patent number 11,848,356
- Issue date Dec 19, 2023
- ATOMERA INCORPORATED
- Keith Doran Weeks
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device including superlattice with oxygen and carbon...
- Patent number 11,837,634
- Issue date Dec 5, 2023
- ATOMERA INCORPORATED
- Keith Doran Weeks
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for making semiconductor device including a superlattice and...
- Patent number 11,810,784
- Issue date Nov 7, 2023
- ATOMERA INCORPORATED
- Marek Hytha
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device including superlattice with O18 enriched monol...
- Patent number 11,728,385
- Issue date Aug 15, 2023
- ATOMERA INCORPORATED
- Marek Hytha
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for making semiconductor device with selective etching of su...
- Patent number 11,721,546
- Issue date Aug 8, 2023
- ATOMERA INCORPORATED
- Marek Hytha
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for making semiconductor device including superlattice with...
- Patent number 11,682,712
- Issue date Jun 20, 2023
- ATOMERA INCORPORATED
- Marek Hytha
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Vertical semiconductor device with enhanced contact structure and a...
- Patent number 11,664,427
- Issue date May 30, 2023
- ATOMERA INCORPORATED
- Robert John Stephenson
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for making semiconductor device with selective etching of su...
- Patent number 11,631,584
- Issue date Apr 18, 2023
- ATOMERA INCORPORATED
- Marek Hytha
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for making superlattice structures with reduced defect densi...
- Patent number 11,430,869
- Issue date Aug 30, 2022
- ATOMERA INCORPORATED
- Keith Doran Weeks
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Vertical semiconductor device with enhanced contact structure and a...
- Patent number 11,387,325
- Issue date Jul 12, 2022
- ATOMERA INCORPORATED
- Robert John Stephenson
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for making semiconductor device including a superlattice wit...
- Patent number 11,302,823
- Issue date Apr 12, 2022
- ATOMERA INCORPORATED
- Keith Doran Weeks
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device including a superlattice with different non-se...
- Patent number 11,177,351
- Issue date Nov 16, 2021
- ATOMERA INCORPORATED
- Keith Doran Weeks
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for making a semiconductor device including a superlattice w...
- Patent number 11,075,078
- Issue date Jul 27, 2021
- ATOMERA INCORPORATED
- Nyles Wynn Cody
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for making a semiconductor device including enhanced contact...
- Patent number 10,879,356
- Issue date Dec 29, 2020
- ATOMERA INCORPORATED
- Robert John Stephenson
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for making superlattice structures with reduced defect densi...
- Patent number 10,811,498
- Issue date Oct 20, 2020
- ATOMERA INCORPORATED
- Keith Doran Weeks
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device including enhanced contact structures having a...
- Patent number 10,777,451
- Issue date Sep 15, 2020
- ATOMERA INCORPORATED
- Robert John Stephenson
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for making a semiconductor device including compound semicon...
- Patent number 10,727,049
- Issue date Jul 28, 2020
- ATOMERA INCORPORATED
- Keith Doran Weeks
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device including superlattice structures with reduced...
- Patent number 10,566,191
- Issue date Feb 18, 2020
- ATOMERA INCORPORATED
- Keith Doran Weeks
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device including compound semiconductor materials and...
- Patent number 10,468,245
- Issue date Nov 5, 2019
- ATOMERA INCORPORATED
- Keith Doran Weeks
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of making a semiconductor device with a buried insulating la...
- Patent number 10,109,479
- Issue date Oct 23, 2018
- ATOMERA INCORPORATED
- Robert J. Mears
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for making enhanced semiconductor structures in single wafer...
- Patent number 9,721,790
- Issue date Aug 1, 2017
- ATOMERA INCORPORATED
- Robert J. Mears
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods for making a semiconductor device including atomic layer st...
- Patent number 9,558,939
- Issue date Jan 31, 2017
- ATOMERA INCORPORATED
- Robert Stephenson
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods for depositing an epitaxial silicon germanium layer having...
- Patent number 9,127,345
- Issue date Sep 8, 2015
- ASM America, Inc.
- Nyles W. Cody
- C23 - COATING METALLIC MATERIAL COATING MATERIAL WITH METALLIC MATERIAL CHEMI...

Patents Applicationslast 30 patents

Information Patent Application
METHOD FOR MAKING GATE-ALL-AROUND (GAA) DEVICE INCLUDING A SUPERLAT...
- Publication number 20250048701
- Publication date Feb 6, 2025
- ATOMERA INCORPORATED
- KEITH DORAN WEEKS
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR MAKING SEMICONDUCTOR DEVICE INCLUDING SUPERLATTICE WITH...
- Publication number 20250006794
- Publication date Jan 2, 2025
- ATOMERA INCORPORATED
- KEITH DORAN WEEKS
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR MAKING SEMICONDUCTOR DEVICE INCLUDING A SUPERLATTICE AND...
- Publication number 20240339319
- Publication date Oct 10, 2024
- ATOMERA INCORPORATED
- MAREK HYTHA
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR MAKING A RADIO FREQUENCY SILICON-ON-INSULATOR (RFSOI) WA...
- Publication number 20240312781
- Publication date Sep 19, 2024
- ATOMERA INCORPORATED
- NYLES WYNN CODY
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
GATE-ALL-AROUND (GAA) DEVICE INCLUDING A SUPERLATTICE
- Publication number 20240194740
- Publication date Jun 13, 2024
- ATOMERA INCORPORATED
- KEITH DORAN WEEKS
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR MAKING SEMICONDUCTOR DEVICE WITH SELECTIVE ETCHING OF SU...
- Publication number 20240194482
- Publication date Jun 13, 2024
- ATOMERA INCORPORATED
- Marek Hytha
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR DEVICE INCLUDING A SUPERLATTICE AND ENRICHED SILICON...
- Publication number 20240170539
- Publication date May 23, 2024
- ATOMERA INCORPORATED
- MAREK HYTHA
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
IMAGE SENSOR DEVICES INCLUDING A SUPERLATTICE
- Publication number 20240072095
- Publication date Feb 29, 2024
- ATOMERA INCORPORATED
- HIDEKI TAKEUCHI
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR MAKING IMAGE SENSOR DEVICES INCLUDING A SUPERLATTICE
- Publication number 20240072096
- Publication date Feb 29, 2024
- ATOMERA INCORPORATED
- HIDEKI TAKEUCHI
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR MAKING SEMICONDUCTOR DEVICE INCLUDING SUPERLATTICE WITH...
- Publication number 20240063268
- Publication date Feb 22, 2024
- ATOMERA INCORPORATED
- KEITH DORAN WEEKS
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHODS FOR MAKING SEMICONDUCTOR DEVICES WITH SUPERLATTICE AND EMBE...
- Publication number 20230411491
- Publication date Dec 21, 2023
- ATOMERA INCORPORATED
- MAREK HYTHA
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR DEVICES WITH EMBEDDED QUANTUM DOTS AND RELATED METHODS
- Publication number 20230411557
- Publication date Dec 21, 2023
- ATOMERA INCORPORATED
- MAREK HYTHA
- B82 - NANO-TECHNOLOGY
Information Patent Application
METHOD FOR MAKING SEMICONDUCTOR DEVICE INCLUDING A SUPERLATTICE AND...
- Publication number 20230395374
- Publication date Dec 7, 2023
- ATOMERA INCORPORATED
- MAREK HYTHA
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR DEVICE INCLUDING SUPERLATTICE WITH O18 ENRICHED MONOL...
- Publication number 20230361178
- Publication date Nov 9, 2023
- ATOMERA INCORPORATED
- Marek Hytha
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR MAKING SEMICONDUCTOR DEVICE WITH SELECTIVE ETCHING OF SU...
- Publication number 20230136797
- Publication date May 4, 2023
- ATOMERA INCORPORATED
- Marek Hytha
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR MAKING SEMICONDUCTOR DEVICE WITH SELECTIVE ETCHING OF SU...
- Publication number 20230135451
- Publication date May 4, 2023
- ATOMERA INCORPORATED
- Marek Hytha
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
GATE-ALL-AROUND (GAA) DEVICE INCLUDING A SUPERLATTICE
- Publication number 20230121774
- Publication date Apr 20, 2023
- ATOMERA INCORPORATED
- KEITH DORAN WEEKS
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR MAKING GATE-ALL-AROUND (GAA) DEVICE INCLUDING A SUPERLAT...
- Publication number 20230122723
- Publication date Apr 20, 2023
- ATOMERA INCORPORATED
- KEITH DORAN WEEKS
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR DEVICE INCLUDING SUPERLATTICE WITH O18 ENRICHED MONOL...
- Publication number 20220384579
- Publication date Dec 1, 2022
- ATOMERA INCORPORATED
- Marek Hytha
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR MAKING SEMICONDUCTOR DEVICE INCLUDING SUPERLATTICE WITH...
- Publication number 20220384612
- Publication date Dec 1, 2022
- ATOMERA INCORPORATED
- Marek Hytha
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR DEVICE INCLUDING A SUPERLATTICE AND ENRICHED SILICON...
- Publication number 20220352322
- Publication date Nov 3, 2022
- ATOMERA INCORPORATED
- MAREK HYTHA
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR MAKING SEMICONDUCTOR DEVICE INCLUDING A SUPERLATTICE AND...
- Publication number 20220344155
- Publication date Oct 27, 2022
- ATOMERA INCORPORATED
- MAREK HYTHA
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
VERTICAL SEMICONDUCTOR DEVICE WITH ENHANCED CONTACT STRUCTURE AND A...
- Publication number 20220285498
- Publication date Sep 8, 2022
- ATOMERA INCORPORATED
- Robert John Stephenson
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR DEVICE INCLUDING SUPERLATTICE WITH OXYGEN AND CARBON...
- Publication number 20220005926
- Publication date Jan 6, 2022
- ATOMERA INCORPORATED
- KEITH DORAN WEEKS
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR MAKING A SEMICONDUCTOR DEVICE USING SUPERLATTICES WITH D...
- Publication number 20220005706
- Publication date Jan 6, 2022
- ATOMERA INCORPORATED
- KEITH DORAN WEEKS
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR MAKING SEMICONDUCTOR DEVICE INCLUDING SUPERLATTICE WITH...
- Publication number 20220005927
- Publication date Jan 6, 2022
- ATOMERA INCORPORATED
- KEITH DORAN WEEKS
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR MAKING SEMICONDUCTOR DEVICE INCLUDING A SUPERLATTICE WIT...
- Publication number 20210265509
- Publication date Aug 26, 2021
- ATOMERA INCORPORATED
- KEITH DORAN WEEKS
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR DEVICE INCLUDING A SUPERLATTICE WITH DIFFERENT NON-SE...
- Publication number 20210265465
- Publication date Aug 26, 2021
- ATOMERA INCORPORATED
- KEITH DORAN WEEKS
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
VERTICAL SEMICONDUCTOR DEVICE WITH ENHANCED CONTACT STRUCTURE AND A...
- Publication number 20210074814
- Publication date Mar 11, 2021
- ATOMERA INCORPORATED
- Robert John Stephenson
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR MAKING SUPERLATTICE STRUCTURES WITH REDUCED DEFECT DENSI...
- Publication number 20200411645
- Publication date Dec 31, 2020
- ATOMERA INCORPORATED
- Keith Doran Weeks
- H01 - BASIC ELECTRIC ELEMENTS

Person

Patents Grantslast 30 patents

Semiconductor device including superlattice with O18 enriched monol...

Method for making a semiconductor superlattices with different non-...

Method for making gate-all-around (GAA) device including a superlat...

Method for making semiconductor device including superlattice with...

Method for making semiconductor device including a superlattice and...

Gate-all-around (GAA) device including a superlattice

Semiconductor device including a superlattice and enriched silicon...

Method for making semiconductor device including superlattice with...

Semiconductor device including superlattice with oxygen and carbon...

Method for making semiconductor device including a superlattice and...

Semiconductor device including superlattice with O18 enriched monol...

Method for making semiconductor device with selective etching of su...

Method for making semiconductor device including superlattice with...

Vertical semiconductor device with enhanced contact structure and a...

Method for making semiconductor device with selective etching of su...

Method for making superlattice structures with reduced defect densi...

Vertical semiconductor device with enhanced contact structure and a...

Method for making semiconductor device including a superlattice wit...

Semiconductor device including a superlattice with different non-se...

Method for making a semiconductor device including a superlattice w...

Method for making a semiconductor device including enhanced contact...

Method for making superlattice structures with reduced defect densi...

Semiconductor device including enhanced contact structures having a...

Method for making a semiconductor device including compound semicon...

Semiconductor device including superlattice structures with reduced...

Semiconductor device including compound semiconductor materials and...

Method of making a semiconductor device with a buried insulating la...

Method for making enhanced semiconductor structures in single wafer...

Methods for making a semiconductor device including atomic layer st...

Methods for depositing an epitaxial silicon germanium layer having...

Patents Applicationslast 30 patents

METHOD FOR MAKING GATE-ALL-AROUND (GAA) DEVICE INCLUDING A SUPERLAT...

METHOD FOR MAKING SEMICONDUCTOR DEVICE INCLUDING SUPERLATTICE WITH...

METHOD FOR MAKING SEMICONDUCTOR DEVICE INCLUDING A SUPERLATTICE AND...

METHOD FOR MAKING A RADIO FREQUENCY SILICON-ON-INSULATOR (RFSOI) WA...

GATE-ALL-AROUND (GAA) DEVICE INCLUDING A SUPERLATTICE

METHOD FOR MAKING SEMICONDUCTOR DEVICE WITH SELECTIVE ETCHING OF SU...

SEMICONDUCTOR DEVICE INCLUDING A SUPERLATTICE AND ENRICHED SILICON...

IMAGE SENSOR DEVICES INCLUDING A SUPERLATTICE

METHOD FOR MAKING IMAGE SENSOR DEVICES INCLUDING A SUPERLATTICE

METHOD FOR MAKING SEMICONDUCTOR DEVICE INCLUDING SUPERLATTICE WITH...

METHODS FOR MAKING SEMICONDUCTOR DEVICES WITH SUPERLATTICE AND EMBE...

SEMICONDUCTOR DEVICES WITH EMBEDDED QUANTUM DOTS AND RELATED METHODS

METHOD FOR MAKING SEMICONDUCTOR DEVICE INCLUDING A SUPERLATTICE AND...

SEMICONDUCTOR DEVICE INCLUDING SUPERLATTICE WITH O18 ENRICHED MONOL...

METHOD FOR MAKING SEMICONDUCTOR DEVICE WITH SELECTIVE ETCHING OF SU...

METHOD FOR MAKING SEMICONDUCTOR DEVICE WITH SELECTIVE ETCHING OF SU...

GATE-ALL-AROUND (GAA) DEVICE INCLUDING A SUPERLATTICE

METHOD FOR MAKING GATE-ALL-AROUND (GAA) DEVICE INCLUDING A SUPERLAT...

SEMICONDUCTOR DEVICE INCLUDING SUPERLATTICE WITH O18 ENRICHED MONOL...

METHOD FOR MAKING SEMICONDUCTOR DEVICE INCLUDING SUPERLATTICE WITH...

SEMICONDUCTOR DEVICE INCLUDING A SUPERLATTICE AND ENRICHED SILICON...

METHOD FOR MAKING SEMICONDUCTOR DEVICE INCLUDING A SUPERLATTICE AND...

VERTICAL SEMICONDUCTOR DEVICE WITH ENHANCED CONTACT STRUCTURE AND A...

SEMICONDUCTOR DEVICE INCLUDING SUPERLATTICE WITH OXYGEN AND CARBON...

METHOD FOR MAKING A SEMICONDUCTOR DEVICE USING SUPERLATTICES WITH D...

METHOD FOR MAKING SEMICONDUCTOR DEVICE INCLUDING SUPERLATTICE WITH...

METHOD FOR MAKING SEMICONDUCTOR DEVICE INCLUDING A SUPERLATTICE WIT...

SEMICONDUCTOR DEVICE INCLUDING A SUPERLATTICE WITH DIFFERENT NON-SE...

VERTICAL SEMICONDUCTOR DEVICE WITH ENHANCED CONTACT STRUCTURE AND A...

METHOD FOR MAKING SUPERLATTICE STRUCTURES WITH REDUCED DEFECT DENSI...