Pier Giorgio Raponi

Person

San Jose, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
System on chip (SoC) builder
- Patent number 11,176,302
- Issue date Nov 16, 2021
- Netspeed Systems, Inc.
- Nishant Rao
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Repository of integration description of hardware intellectual prop...
- Patent number 10,896,476
- Issue date Jan 19, 2021
- Netspeed Systems, Inc.
- Nishant Rao
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Automatic crossbar generation and router connections for network-on...
- Patent number 10,547,514
- Issue date Jan 28, 2020
- Netspeed Systems, Inc.
- Nishant Rao
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Automatic performance characterization of a network-on-chip (NOC) i...
- Patent number 10,528,682
- Issue date Jan 7, 2020
- NetSpeed Systems
- Sailesh Kumar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System-on-chip (SoC) optimization through transformation and genera...
- Patent number 10,348,563
- Issue date Jul 9, 2019
- Nishant Rao
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method for network on chip construction through machine...
- Patent number 10,313,269
- Issue date Jun 4, 2019
- Pier Giorgio Raponi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systems and methods for NoC construction
- Patent number 10,298,485
- Issue date May 21, 2019
- Pier Giorgio Raponi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Generation of network-on-chip layout based on user specified topolo...
- Patent number 10,218,581
- Issue date Feb 26, 2019
- NetSpeed Systems
- Pier Giorgio Raponi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Extracting features from a NoC for machine learning construction
- Patent number 10,084,725
- Issue date Sep 25, 2018
- Netspeed Systems, Inc.
- Pier Giorgio Raponi
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Generation of network-on-chip layout based on user specified topolo...
- Patent number 10,050,843
- Issue date Aug 14, 2018
- NetSpeed Systems
- Pier Giorgio Raponi
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Systems and methods for selecting a router to connect a bridge in t...
- Patent number 9,762,474
- Issue date Sep 12, 2017
- NetSpeed Systems
- Sailesh Kumar
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Automatic power domain and voltage domain assignment to system-on-c...
- Patent number 9,529,400
- Issue date Dec 27, 2016
- NetSpeed Systems
- Sailesh Kumar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Transactional traffic specification for network-on-chip design
- Patent number 9,473,359
- Issue date Oct 18, 2016
- NetSpeed Systems
- Sailesh Kumar
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
System and method for visualization of NoC performance based on sim...
- Patent number 9,444,702
- Issue date Sep 13, 2016
- NetSpeed Systems
- Pier Giorgio Raponi
- H04 - ELECTRIC COMMUNICATION TECHNIQUE

Patents Applicationslast 30 patents

Information Patent Application
SYSTEM ON CHIP (SOC) BUILDER
- Publication number 20190266307
- Publication date Aug 29, 2019
- NetSpeed Systems, Inc.
- Nishant RAO
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
REPOSITORY OF INTEGRATION DESCRIPTION OF HARDWARE INTELLECTUAL PROP...
- Publication number 20190259113
- Publication date Aug 22, 2019
- NetSpeed Systems, Inc.
- Nishant RAO
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
AUTOMATIC CROSSBAR GENERATION AND ROUTER CONNECTIONS FOR NETWORK-ON...
- Publication number 20190260644
- Publication date Aug 22, 2019
- NetSpeed Systems, Inc.
- Nishant RAO
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
GENERATION OF NETWORK-ON-CHIP LAYOUT BASED ON USER SPECIFIED TOPOLO...
- Publication number 20180302293
- Publication date Oct 18, 2018
- NetSpeed Systems, Inc.
- Pier Giorgio RAPONI
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
SYSTEM-ON-CHIP (SOC) OPTIMIZATION THROUGH TRANSFORMATION AND GENERA...
- Publication number 20180227180
- Publication date Aug 9, 2018
- NetSpeed Systems, Inc.
- Nishant RAO
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Systems and Methods for NoC Construction
- Publication number 20180227215
- Publication date Aug 9, 2018
- NetSpeed Systems, Inc.
- Pier Giorgio RAPONI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Infrastructure to Apply Machine Learning for NoC Construction
- Publication number 20180198687
- Publication date Jul 12, 2018
- NetSpeed Systems, Inc.
- Nishant RAO
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
EXTRACTING FEATURES FROM A NoC FOR MACHINE LEARNING CONSTRUCTION
- Publication number 20180198734
- Publication date Jul 12, 2018
- NetSpeed Systems, Inc.
- Pier Giorgio RAPONI
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Metrics to Train Machine Learning Predictor for NoC Construction
- Publication number 20180197110
- Publication date Jul 12, 2018
- NetSpeed Systems, Inc.
- Nishant RAO
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Strategies for NoC Construction Using Machine Learning
- Publication number 20180198682
- Publication date Jul 12, 2018
- NetSpeed Systems, Inc.
- Nishant RAO
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TRAFFIC MAPPING OF A NETWORK ON CHIP THROUGH MACHINE LEARNING
- Publication number 20180183728
- Publication date Jun 28, 2018
- NetSpeed Systems, Inc.
- Sailesh KUMAR
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
SYSTEM AND METHOD FOR NETWORK ON CHIP CONSTRUCTION THROUGH MACHINE...
- Publication number 20180183715
- Publication date Jun 28, 2018
- NetSpeed Systems, Inc.
- Pier Giorgio Raponi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TRAFFIC MAPPING OF A NETWORK ON CHIP THROUGH MACHINE LEARNING
- Publication number 20180183726
- Publication date Jun 28, 2018
- NetSpeed Systems, Inc.
- Sailesh KUMAR
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
TRAFFIC MAPPING OF A NETWORK ON CHIP THROUGH MACHINE LEARNING
- Publication number 20180183727
- Publication date Jun 28, 2018
- NetSpeed Systems, Inc.
- Sailesh KUMAR
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
GENERATION OF NETWORK-ON-CHIP LAYOUT BASED ON USER SPECIFIED TOPOLO...
- Publication number 20170063639
- Publication date Mar 2, 2017
- NETSPEED SYSTEMS
- Pier Giorgio Raponi
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
AUTOMATIC PERFORMANCE CHARACTERIZATION OF A NETWORK-ON-CHIP (NOC) I...
- Publication number 20170061041
- Publication date Mar 2, 2017
- NETSPEED SYSTEMS
- Sailesh Kumar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TRANSACTIONAL TRAFFIC SPECIFICATION FOR NETWORK-ON-CHIP DESIGN
- Publication number 20150358211
- Publication date Dec 10, 2015
- NETSPEED SYSTEMS
- Sailesh Kumar
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
SYSTEMS AND METHODS FOR SELECTING A ROUTER TO CONNECT A BRIDGE IN T...
- Publication number 20150288596
- Publication date Oct 8, 2015
- NETSPEED SYSTEMS
- Sailesh Kumar
- H04 - ELECTRIC COMMUNICATION TECHNIQUE

Pier Giorgio Raponi

Person

Patents Grantslast 30 patents

System on chip (SoC) builder

Repository of integration description of hardware intellectual prop...

Automatic crossbar generation and router connections for network-on...

Automatic performance characterization of a network-on-chip (NOC) i...

System-on-chip (SoC) optimization through transformation and genera...

System and method for network on chip construction through machine...

Systems and methods for NoC construction

Generation of network-on-chip layout based on user specified topolo...

Extracting features from a NoC for machine learning construction

Generation of network-on-chip layout based on user specified topolo...

Systems and methods for selecting a router to connect a bridge in t...

Automatic power domain and voltage domain assignment to system-on-c...

Transactional traffic specification for network-on-chip design

System and method for visualization of NoC performance based on sim...

Patents Applicationslast 30 patents

SYSTEM ON CHIP (SOC) BUILDER

REPOSITORY OF INTEGRATION DESCRIPTION OF HARDWARE INTELLECTUAL PROP...

AUTOMATIC CROSSBAR GENERATION AND ROUTER CONNECTIONS FOR NETWORK-ON...

GENERATION OF NETWORK-ON-CHIP LAYOUT BASED ON USER SPECIFIED TOPOLO...

SYSTEM-ON-CHIP (SOC) OPTIMIZATION THROUGH TRANSFORMATION AND GENERA...

Systems and Methods for NoC Construction

Infrastructure to Apply Machine Learning for NoC Construction

EXTRACTING FEATURES FROM A NoC FOR MACHINE LEARNING CONSTRUCTION

Metrics to Train Machine Learning Predictor for NoC Construction

Strategies for NoC Construction Using Machine Learning

TRAFFIC MAPPING OF A NETWORK ON CHIP THROUGH MACHINE LEARNING

SYSTEM AND METHOD FOR NETWORK ON CHIP CONSTRUCTION THROUGH MACHINE...

TRAFFIC MAPPING OF A NETWORK ON CHIP THROUGH MACHINE LEARNING

TRAFFIC MAPPING OF A NETWORK ON CHIP THROUGH MACHINE LEARNING

GENERATION OF NETWORK-ON-CHIP LAYOUT BASED ON USER SPECIFIED TOPOLO...

AUTOMATIC PERFORMANCE CHARACTERIZATION OF A NETWORK-ON-CHIP (NOC) I...

TRANSACTIONAL TRAFFIC SPECIFICATION FOR NETWORK-ON-CHIP DESIGN

SYSTEMS AND METHODS FOR SELECTING A ROUTER TO CONNECT A BRIDGE IN T...