Reynold V. D'Sa

Person

Portland, OR, US

People

Patents Grantslast 30 patents

Information Patent Grant
Detection, recovery and prevention of bogus branches
- Patent number 7,334,115
- Issue date Feb 19, 2008
- Intel Corporation
- Reynold V. D'Sa
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for performing sequential executions of elemen...
- Patent number 6,715,064
- Issue date Mar 30, 2004
- Intel Corporation
- Reynold V. D'Sa
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Recovery from writeback stage event signal or micro-branch mispredi...
- Patent number 6,493,821
- Issue date Dec 10, 2002
- Intel Corporation
- Reynold V. D'Sa
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method of maintaining and utilizing multiple return stac...
- Patent number 6,374,350
- Issue date Apr 16, 2002
- Intel Corporation
- Reynold V. D'Sa
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method of maintaining and utilizing multiple return stac...
- Patent number 6,151,671
- Issue date Nov 21, 2000
- Intel Corporation
- Reynold V. D'Sa
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method for processing a plurality of branch instructions...
- Patent number 6,055,630
- Issue date Apr 25, 2000
- Intel Corporation
- Reynold V. D'Sa
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Trace branch prediction unit
- Patent number 6,014,742
- Issue date Jan 11, 2000
- Intel Corporation
- Robert Franklin Krick
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for implementing a set-associative branch targ...
- Patent number 5,944,817
- Issue date Aug 31, 1999
- Intel Corporation
- Bradley D. Hoyt
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for a branch instruction pointer table
- Patent number 5,918,046
- Issue date Jun 29, 1999
- Intel Corporation
- Bradley D. Hoyt
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for implementing a branch target buffer in CIS...
- Patent number 5,903,751
- Issue date May 11, 1999
- Intel Corporation
- Bradley D. Hoyt
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Dual prediction branch system having two step of branch recovery pr...
- Patent number 5,812,839
- Issue date Sep 22, 1998
- Intel Corporation
- Bradley D. Hoyt
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for predicting and handling resolving return f...
- Patent number 5,768,576
- Issue date Jun 16, 1998
- Intel Corporation
- Bradley D. Hoyt
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for implementing a set-associative branch targ...
- Patent number 5,706,492
- Issue date Jan 6, 1998
- Intel Corporation
- Bradley D. Hoyt
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for resolving return from subroutine instructi...
- Patent number 5,604,877
- Issue date Feb 18, 1997
- Intel Corporation
- Bradley D. Hoyt
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for implementing a set-associative branch targ...
- Patent number 5,574,871
- Issue date Nov 12, 1996
- Intel Corporation
- Bradley D. Hoyt
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
Method and apparatus for performing sequential executions of elemen...
- Publication number 20040088525
- Publication date May 6, 2004
- Reynold V. D'Sa
- G06 - COMPUTING CALCULATING COUNTING

Reynold V. D'Sa

Person

Patents Grantslast 30 patents

Detection, recovery and prevention of bogus branches

Method and apparatus for performing sequential executions of elemen...

Recovery from writeback stage event signal or micro-branch mispredi...

System and method of maintaining and utilizing multiple return stac...

System and method of maintaining and utilizing multiple return stac...

System and method for processing a plurality of branch instructions...

Trace branch prediction unit

Method and apparatus for implementing a set-associative branch targ...

Method and apparatus for a branch instruction pointer table

Method and apparatus for implementing a branch target buffer in CIS...

Dual prediction branch system having two step of branch recovery pr...

Method and apparatus for predicting and handling resolving return f...

Method and apparatus for implementing a set-associative branch targ...

Method and apparatus for resolving return from subroutine instructi...

Method and apparatus for implementing a set-associative branch targ...

Patents Applicationslast 30 patents

Method and apparatus for performing sequential executions of elemen...