RICK L. WISE

Person

PLANO, TX, US

People

Patents Grantslast 30 patents

Information Patent Grant
High mobility transistors
- Patent number 10,978,353
- Issue date Apr 13, 2021
- Texas Instruments Incorporated
- Manoj Mehrotra
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
High mobility transistors
- Patent number 10,163,725
- Issue date Dec 25, 2018
- Texas Instruments Incorporated
- Manoj Mehrotra
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Ultrashallow emitter formation using ALD and high temperature short...
- Patent number 10,026,815
- Issue date Jul 17, 2018
- Texas Instruments Incorporated
- Rick L. Wise
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
High mobility transistors
- Patent number 9,805,986
- Issue date Oct 31, 2017
- Texas Instruments Incorporated
- Hiroaki Niimi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
High mobility transistors
- Patent number 9,496,262
- Issue date Nov 15, 2016
- Texas Instruments Incorporated
- Manoj Mehrotra
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Layer transfer of silicon onto III-nitride material for heterogenou...
- Patent number 9,396,948
- Issue date Jul 19, 2016
- Texas Instruments Incorporated
- Naveen Tipirneni
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
High mobility transistors
- Patent number 9,324,717
- Issue date Apr 26, 2016
- Texas Instruments Incorporated
- Hiroaki Niimi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuits with aligned (100) NMOS and (110) PMOS finFET s...
- Patent number 9,053,966
- Issue date Jun 9, 2015
- Texas Instruments Incorporated
- Weize W. Xiong
- G11 - INFORMATION STORAGE
Information Patent Grant
Integrated circuits with aligned (100) NMOS and (110) PMOS FinFET s...
- Patent number 8,872,220
- Issue date Oct 28, 2014
- Texas Instruments Incorporated
- Weize W. Xiong
- G11 - INFORMATION STORAGE
Information Patent Grant
Reduction of STI corner defects during SPE in semiconductor device...
- Patent number 8,846,487
- Issue date Sep 30, 2014
- Texas Instruments Incorporated
- Angelo Pinto
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Formation of a selective carbon-doped epitaxial cap layer on select...
- Patent number 8,835,263
- Issue date Sep 16, 2014
- Texas Instruments Incorporated
- Johan Weijtmans
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Ultrashallow emitter formation using ALD and high temperature short...
- Patent number 8,828,835
- Issue date Sep 9, 2014
- Texas Instruments Incorporated
- Rick L. Wise
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Accelerated furnace ramp rates for reduced slip
- Patent number 8,759,198
- Issue date Jun 24, 2014
- Texas Instruments Incorporated
- Bradley David Sucher
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuits with aligned (100) NMOS and (110) PMOS FinFET s...
- Patent number 8,410,519
- Issue date Apr 2, 2013
- Texas Instruments Incorporated
- Weize Xiong
- G11 - INFORMATION STORAGE
Information Patent Grant
Method for forming integrated circuits with aligned (100) NMOS and...
- Patent number 8,138,035
- Issue date Mar 20, 2012
- Texas Instruments Incorporated
- Weize Xiong
- G11 - INFORMATION STORAGE
Information Patent Grant
Epitaxial deposition-based processes for reducing gate dielectric t...
- Patent number 8,053,322
- Issue date Nov 8, 2011
- Texas Instruments Incorporated
- Vladimir F. Drobny
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of making (100) NMOS and (110) PMOS sidewall surface on the...
- Patent number 7,897,994
- Issue date Mar 1, 2011
- Texas Instruments Incorporated
- Weize Xiong
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor device made by the method of producing hybrid orientn...
- Patent number 7,767,510
- Issue date Aug 3, 2010
- Texas Instruments Incorporated
- Rick L. Wise
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Trench isolation structure having an implanted buffer layer
- Patent number 7,443,007
- Issue date Oct 28, 2008
- Texas Instruments Incorporated
- Rick L. Wise
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Trench isolation structure and a method of manufacture therefor
- Patent number 7,371,658
- Issue date May 13, 2008
- Texas Instruments Incorporated
- Rick L. Wise
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Ultra-shallow arsenic junction formation in silicon germanium
- Patent number 7,163,878
- Issue date Jan 16, 2007
- Texas Instruments Incorporated
- Puneet Kohli
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of manufacture for a trench isolation structure having an im...
- Patent number 7,160,782
- Issue date Jan 9, 2007
- Texas Instruments Incorporated
- Rick L. Wise
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Capacitor and memory structure and method
- Patent number 6,699,745
- Issue date Mar 2, 2004
- Texas Instruments Incorporated
- Aditi Banerjee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Process for monitoring the thickness of layers in a microelectronic...
- Patent number 6,605,482
- Issue date Aug 12, 2003
- Texas Instruments Incorporated
- Francis G. Celii
- G01 - MEASURING TESTING
Information Patent Grant
Post-in-crown capacitor and method of manufacture
- Patent number 6,496,352
- Issue date Dec 17, 2002
- Texas Instruments Incorporated
- Darius L. Crenshaw
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit isolation
- Patent number 6,326,281
- Issue date Dec 4, 2001
- Texas Instruments Incorporated
- Katherine E. Violette
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit and method
- Patent number 6,287,924
- Issue date Sep 11, 2001
- Texas Instruments Incorporated
- Chih-Ping Chao
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Rapid thermal annealing of doped polycrystalline silicon structures...
- Patent number 6,204,198
- Issue date Mar 20, 2001
- Texas Instruments Incorporated
- Aditi D. Banerjee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Capacitor and memory structure and method
- Patent number 6,197,653
- Issue date Mar 6, 2001
- Texas Instruments Incorporated
- Rajesh B. Khamankar
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of and apparatus for purifying reduced pressure process cham...
- Patent number 6,135,460
- Issue date Oct 24, 2000
- Texas Instruments Incorporated
- Rick L. Wise
- C09 - DYES PAINTS POLISHES NATURAL RESINS ADHESIVES MISCELLANEOUS COMPOSITION...

Patents Applicationslast 30 patents

Information Patent Application
HIGH MOBILITY TRANSISTORS
- Publication number 20210225711
- Publication date Jul 22, 2021
- TEXAS INSTRUMENTS INCORPORATED
- Manoj Mehrotra
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
HIGH MOBILITY TRANSISTORS
- Publication number 20190103321
- Publication date Apr 4, 2019
- TEXAS INSTRUMENTS INCORPORATED
- Manoj Mehrotra
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
HIGH MOBILITY TRANSISTORS
- Publication number 20170033018
- Publication date Feb 2, 2017
- TEXAS INSTRUMENTS INCORPORATED
- Manoj Mehrotra
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
HIGH MOBILITY TRANSISTORS
- Publication number 20160225673
- Publication date Aug 4, 2016
- TEXAS INSTRUMENTS INCORPORATED
- Hiroaki Niimi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
HIGH MOBILITY TRANSISTORS
- Publication number 20160204198
- Publication date Jul 14, 2016
- TEXAS INSTRUMENTS INCORPORATED
- Hiroaki Niimi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
TEMPERATURE COMPENSATED BULK ACOUSTIC WAVE RESONATOR WITH A HIGH CO...
- Publication number 20150295556
- Publication date Oct 15, 2015
- Texas Instrument Incorporated
- Stuart M. Jacobsen
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
MECHANICALLY ROBUST SILICON SUBSTRATE HAVING GROUP IIIA-N EPITAXIAL...
- Publication number 20150243494
- Publication date Aug 27, 2015
- TEXAS INSTRUMENTS INCORPORATED
- MICHAEL LOUIS HAYDEN
- C30 - CRYSTAL GROWTH
Information Patent Application
METHOD TO IMPROVE SLIP RESISTANCE OF SILICON WAFERS
- Publication number 20150187597
- Publication date Jul 2, 2015
- TEXAS INSTRUMENTS INCORPORATED
- Bradley David SUCHER
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
HIGH MOBILITY TRANSISTORS
- Publication number 20150187773
- Publication date Jul 2, 2015
- TEXAS INSTRUMENTS INCORPORATED
- Hiroaki Niimi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
HIGH MOBILITY TRANSISTORS
- Publication number 20150187770
- Publication date Jul 2, 2015
- TEXAS INSTRUMENTS INCORPORATED
- Manoj Mehrotra
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CZOCHRALSKI SUBSTRATES HAVING REDUCED OXYGEN DONORS
- Publication number 20150118861
- Publication date Apr 30, 2015
- TEXAS INSTRUMENTS INCORPORATED
- BRADLEY DAVID SUCHER
- C30 - CRYSTAL GROWTH
Information Patent Application
INTEGRATED CIRCUITS WITH ALIGNED (100) NMOS AND (110) PMOS FINFET S...
- Publication number 20150014789
- Publication date Jan 15, 2015
- TEXAS INSTRUMENTS INCORPORATED
- Weize W. Xiong
- G11 - INFORMATION STORAGE
Information Patent Application
Ultrashallow Emitter Formation Using ALD and High Temperature Short...
- Publication number 20140339678
- Publication date Nov 20, 2014
- Rick L. WISE
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
LAYER TRANSFER OF SILICON ONTO III-NITRIDE MATERIAL FOR HETEROGENOU...
- Publication number 20140329370
- Publication date Nov 6, 2014
- TEXAS INSTRUMENTS INCORPORATED
- Naveen TIPIRNENI
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
ACCELERATED FURNACE RAMP RATES FOR REDUCED SLIP
- Publication number 20140045321
- Publication date Feb 13, 2014
- TEXAS INSTRUMENTS INCORPORATED
- Bradley David SUCHER
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUITS WITH ALIGNED (100) NMOS AND (110) PMOS FINFET S...
- Publication number 20140035057
- Publication date Feb 6, 2014
- TEXAS INSTRUMENTS INCORPORATED
- Weize W. Xiong
- G11 - INFORMATION STORAGE
Information Patent Application
EXTENDED AREA COVER PLATE FOR INTEGRATED INFRARED SENSOR
- Publication number 20130062720
- Publication date Mar 14, 2013
- TEXAS INSTRUMENTS INCORPORATED
- Rick L. Wise
- G01 - MEASURING TESTING
Information Patent Application
REDUCTION OF STI CORNER DEFECTS DURING SPE IN SEMICONDUCTOR DEVICE...
- Publication number 20130029471
- Publication date Jan 31, 2013
- TEXAS INSTRUMENTS INCORPORATED
- Angelo Pinto
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUITS WITH ALIGNED (100) NMOS AND (110) PMOS FINFET S...
- Publication number 20120175710
- Publication date Jul 12, 2012
- TEXAS INSTRUMENTS INCORPORATED
- Weize Xiong
- G11 - INFORMATION STORAGE
Information Patent Application
METHOD FOR FORMING INTEGRATED CIRCUITS WITH ALIGNED (100) NMOS AND...
- Publication number 20110151651
- Publication date Jun 23, 2011
- TEXAS INSTRUMENTS INCORPORATED
- Weize Xiong
- G11 - INFORMATION STORAGE
Information Patent Application
Ultrashallow Emitter Formation Using ALD and High Temperature Short...
- Publication number 20110057289
- Publication date Mar 10, 2011
- TEXAS INSTRUMENTS INCORPORATED
- Rick L. Wise
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
REDUCTION OF STI CORNER DEFECTS DURING SPE IN SEMICONDCUTOR DEVICE...
- Publication number 20100304547
- Publication date Dec 2, 2010
- TEXAS INSTRUMENTS INCORPORATED
- Angelo Pinto
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
EPITAXIAL DEPOSITION-BASED PROCESSES FOR REDUCING GATE DIELECTRIC T...
- Publication number 20100163997
- Publication date Jul 1, 2010
- TEXAS INSTRUMENTS INCORPORATED
- Vladimir F. DROBNY
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD TO REDUCE RESIDUAL STI CORNER DEFECTS GENERATED DURING SPE I...
- Publication number 20090057816
- Publication date Mar 5, 2009
- Angelo Pinto
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD OF MAKING (100) NMOS AND (110) PMOS SIDEWALL SURFACE ON THE...
- Publication number 20080308847
- Publication date Dec 18, 2008
- Weize XIONG
- G11 - INFORMATION STORAGE
Information Patent Application
Semiconductor Device Made by the Method of Producing Hybrid Orientn...
- Publication number 20080303027
- Publication date Dec 11, 2008
- TEXAS INSTRUMENTS INCORPORATED
- Rick L. Wise
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Formation of a Selective Carbon-Doped Epitaxial Cap Layer on Select...
- Publication number 20080199999
- Publication date Aug 21, 2008
- TEXAS INSTRUMENTS INCORPORATED
- Johan Weijtmans
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Trench Isolation Structure and a Method of Manufacture Therefor
- Publication number 20080185675
- Publication date Aug 7, 2008
- TEXAS INSTRUMENTS INCORPORATED
- Rick L. Wise
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor Device Manufactured Using Passivation of Crystal Doma...
- Publication number 20080128821
- Publication date Jun 5, 2008
- TEXAS INSTRUMENTS INCORPORATED
- Angelo Pinto
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method of Manufacture for a Trench Isolation Structure Having an Im...
- Publication number 20070085164
- Publication date Apr 19, 2007
- TEXAS INSTRUMENTS INCORPORATED
- Rick L. Wise
- H01 - BASIC ELECTRIC ELEMENTS

RICK L. WISE

Person

Patents Grantslast 30 patents

High mobility transistors

High mobility transistors

Ultrashallow emitter formation using ALD and high temperature short...

High mobility transistors

High mobility transistors

Layer transfer of silicon onto III-nitride material for heterogenou...

High mobility transistors

Integrated circuits with aligned (100) NMOS and (110) PMOS finFET s...

Integrated circuits with aligned (100) NMOS and (110) PMOS FinFET s...

Reduction of STI corner defects during SPE in semiconductor device...

Formation of a selective carbon-doped epitaxial cap layer on select...

Ultrashallow emitter formation using ALD and high temperature short...

Accelerated furnace ramp rates for reduced slip

Integrated circuits with aligned (100) NMOS and (110) PMOS FinFET s...

Method for forming integrated circuits with aligned (100) NMOS and...

Epitaxial deposition-based processes for reducing gate dielectric t...

Method of making (100) NMOS and (110) PMOS sidewall surface on the...

Semiconductor device made by the method of producing hybrid orientn...

Trench isolation structure having an implanted buffer layer

Trench isolation structure and a method of manufacture therefor

Ultra-shallow arsenic junction formation in silicon germanium

Method of manufacture for a trench isolation structure having an im...

Capacitor and memory structure and method

Process for monitoring the thickness of layers in a microelectronic...

Post-in-crown capacitor and method of manufacture

Integrated circuit isolation

Integrated circuit and method

Rapid thermal annealing of doped polycrystalline silicon structures...

Capacitor and memory structure and method

Method of and apparatus for purifying reduced pressure process cham...

Patents Applicationslast 30 patents

HIGH MOBILITY TRANSISTORS

HIGH MOBILITY TRANSISTORS

HIGH MOBILITY TRANSISTORS

HIGH MOBILITY TRANSISTORS

HIGH MOBILITY TRANSISTORS

TEMPERATURE COMPENSATED BULK ACOUSTIC WAVE RESONATOR WITH A HIGH CO...

MECHANICALLY ROBUST SILICON SUBSTRATE HAVING GROUP IIIA-N EPITAXIAL...

METHOD TO IMPROVE SLIP RESISTANCE OF SILICON WAFERS

HIGH MOBILITY TRANSISTORS

HIGH MOBILITY TRANSISTORS

CZOCHRALSKI SUBSTRATES HAVING REDUCED OXYGEN DONORS

INTEGRATED CIRCUITS WITH ALIGNED (100) NMOS AND (110) PMOS FINFET S...

Ultrashallow Emitter Formation Using ALD and High Temperature Short...

LAYER TRANSFER OF SILICON ONTO III-NITRIDE MATERIAL FOR HETEROGENOU...

ACCELERATED FURNACE RAMP RATES FOR REDUCED SLIP

INTEGRATED CIRCUITS WITH ALIGNED (100) NMOS AND (110) PMOS FINFET S...

EXTENDED AREA COVER PLATE FOR INTEGRATED INFRARED SENSOR

REDUCTION OF STI CORNER DEFECTS DURING SPE IN SEMICONDUCTOR DEVICE...

INTEGRATED CIRCUITS WITH ALIGNED (100) NMOS AND (110) PMOS FINFET S...

METHOD FOR FORMING INTEGRATED CIRCUITS WITH ALIGNED (100) NMOS AND...

Ultrashallow Emitter Formation Using ALD and High Temperature Short...

REDUCTION OF STI CORNER DEFECTS DURING SPE IN SEMICONDCUTOR DEVICE...

EPITAXIAL DEPOSITION-BASED PROCESSES FOR REDUCING GATE DIELECTRIC T...

METHOD TO REDUCE RESIDUAL STI CORNER DEFECTS GENERATED DURING SPE I...

METHOD OF MAKING (100) NMOS AND (110) PMOS SIDEWALL SURFACE ON THE...

Semiconductor Device Made by the Method of Producing Hybrid Orientn...

Formation of a Selective Carbon-Doped Epitaxial Cap Layer on Select...

Trench Isolation Structure and a Method of Manufacture Therefor

Semiconductor Device Manufactured Using Passivation of Crystal Doma...

Method of Manufacture for a Trench Isolation Structure Having an Im...