Robert P. Colwell

Person

Portland, OR, US

People

Patents Grantslast 30 patents

Information Patent Grant
Linear address extension and mapping to physical memory using 4 and...
- Patent number 6,349,380
- Issue date Feb 19, 2002
- Intel Corporation
- Shahrokh Shahidzadeh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for maximum throughput scheduling of dependent...
- Patent number 6,101,597
- Issue date Aug 8, 2000
- Intel Corporation
- Robert P. Colwell
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Processor that redirects an instruction fetch pipeline immediately...
- Patent number 6,079,014
- Issue date Jun 20, 2000
- Intel Corporation
- David B. Papworth
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Self-monitoring distributed hardware systems
- Patent number 6,079,033
- Issue date Jun 20, 2000
- Intel Corporation
- James E. Jacobson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Flag renaming and flag masks within register alias table
- Patent number 6,047,369
- Issue date Apr 4, 2000
- Intel Corporation
- Robert P. Colwell
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Exception handling in a processor that performs speculative out-of-...
- Patent number 5,987,600
- Issue date Nov 16, 1999
- Intel Corporation
- David B. Papworth
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Mechanism for efficiently overlapping multiple operand types in a m...
- Patent number 5,974,523
- Issue date Oct 26, 1999
- Intel Corporation
- Andrew F. Glew
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for providing address-size backward compatibil...
- Patent number 5,913,050
- Issue date Jun 15, 1999
- Intel Corporation
- Darrell D. Boggs
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Register alias table update to indicate architecturally visible state
- Patent number 5,826,094
- Issue date Oct 20, 1998
- Intel Corporation
- Robert P. Colwell
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for changing flow of control in a processor
- Patent number 5,809,271
- Issue date Sep 15, 1998
- Intel Corporation
- Robert P. Colwell
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods and apparatus for determining operating characteristics of...
- Patent number 5,778,407
- Issue date Jul 7, 1998
- Intel Corporation
- Andrew F. Glew
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for dynamic allocation of multiple buffers in...
- Patent number 5,778,245
- Issue date Jul 7, 1998
- Intel Corporation
- David B. Papworth
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Computer system with self-consistent ordering mechanism
- Patent number 5,751,986
- Issue date May 12, 1998
- Intel Corporation
- Michael A. Fetterman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for predicting, clearing and redirecting unpre...
- Patent number 5,729,728
- Issue date Mar 17, 1998
- Intel Corporation
- Robert P. Colwell
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Data processor with circuitry for handling pointers associated with...
- Patent number 5,727,176
- Issue date Mar 10, 1998
- Intel Corporation
- David W. Clift
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method for pipeline processing of instructions by controlling acces...
- Patent number 5,721,855
- Issue date Feb 24, 1998
- Intel Corporation
- Glenn J. Hinton
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for maintaining a macro instruction for refetc...
- Patent number 5,687,338
- Issue date Nov 11, 1997
- Intel Corporation
- Darrell D. Boggs
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Speculative and committed resource files in an out-of-order processor
- Patent number 5,627,985
- Issue date May 6, 1997
- Intel Corporation
- Michael A. Fetterman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for zero extension and bit shifting to preserv...
- Patent number 5,615,385
- Issue date Mar 25, 1997
- Intel Corporation
- Michael A. Fetterman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Integer and floating point register alias table within processor de...
- Patent number 5,613,132
- Issue date Mar 18, 1997
- Intel Corporation
- David W. Clift
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for avoiding writeback conflicts between execu...
- Patent number 5,604,878
- Issue date Feb 18, 1997
- Intel Corporation
- Robert P. Colwell
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Entry allocation in a circular buffer
- Patent number 5,584,037
- Issue date Dec 10, 1996
- Intel Corporation
- David B. Papworth
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Entry allocation in a circular buffer using wrap bits indicating wh...
- Patent number 5,584,038
- Issue date Dec 10, 1996
- Intel Corporation
- David B. Papworth
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Hybrid execution unit for complex microprocessor
- Patent number 5,574,942
- Issue date Nov 12, 1996
- Intel Corporation
- Robert P. Colwell
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for implementing a non-blocking translation lo...
- Patent number 5,564,111
- Issue date Oct 8, 1996
- Intel Corporation
- Andrew F. Glew
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for zero extension and bit shifting to preserv...
- Patent number 5,564,056
- Issue date Oct 8, 1996
- Intel Corporation
- Michael A. Fetterman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods and apparatus for determining memory operating characterist...
- Patent number 5,561,814
- Issue date Oct 1, 1996
- Intel Corporation
- Andrew F. Glew
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
N-wide bypass for data dependencies within register alias table
- Patent number 5,548,776
- Issue date Aug 20, 1996
- Intel Corporation
- Robert P. Colwell
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Ready selection of data dependent instructions using multi-cycle ca...
- Patent number 5,546,597
- Issue date Aug 13, 1996
- Intel Corporation
- Robert W. Martell
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus and method for renaming registers in a processor and reso...
- Patent number 5,524,262
- Issue date Jun 4, 1996
- Intel Corporation
- Robert P. Colwell
- G06 - COMPUTING CALCULATING COUNTING

Robert P. Colwell

Person

Patents Grantslast 30 patents

Linear address extension and mapping to physical memory using 4 and...

Method and apparatus for maximum throughput scheduling of dependent...

Processor that redirects an instruction fetch pipeline immediately...

Self-monitoring distributed hardware systems

Flag renaming and flag masks within register alias table

Exception handling in a processor that performs speculative out-of-...

Mechanism for efficiently overlapping multiple operand types in a m...

Method and apparatus for providing address-size backward compatibil...

Register alias table update to indicate architecturally visible state

Method and apparatus for changing flow of control in a processor

Methods and apparatus for determining operating characteristics of...

Method and apparatus for dynamic allocation of multiple buffers in...

Computer system with self-consistent ordering mechanism

Method and apparatus for predicting, clearing and redirecting unpre...

Data processor with circuitry for handling pointers associated with...

Method for pipeline processing of instructions by controlling acces...

Method and apparatus for maintaining a macro instruction for refetc...

Speculative and committed resource files in an out-of-order processor

Method and apparatus for zero extension and bit shifting to preserv...

Integer and floating point register alias table within processor de...

Method and apparatus for avoiding writeback conflicts between execu...

Entry allocation in a circular buffer

Entry allocation in a circular buffer using wrap bits indicating wh...

Hybrid execution unit for complex microprocessor

Method and apparatus for implementing a non-blocking translation lo...

Method and apparatus for zero extension and bit shifting to preserv...

Methods and apparatus for determining memory operating characterist...

N-wide bypass for data dependencies within register alias table

Ready selection of data dependent instructions using multi-cycle ca...

Apparatus and method for renaming registers in a processor and reso...