Ross Alan Kohler

Person

Allentown, PA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Secure random number generator
- Patent number 8,566,377
- Issue date Oct 22, 2013
- Agere Systems LLC
- Edward B. Harris
- G11 - INFORMATION STORAGE
Information Patent Grant
Optimization of circuits having repeatable circuit instances
- Patent number 8,516,408
- Issue date Aug 20, 2013
- LSI Corporation
- Richard Bruce Dell
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
High-reliability memory
- Patent number 8,468,419
- Issue date Jun 18, 2013
- LSI Corporation
- Dennis E. Dudeck
- G11 - INFORMATION STORAGE
Information Patent Grant
Integrated circuit self-monitored burn-in
- Patent number 8,405,412
- Issue date Mar 26, 2013
- LSI Corporation
- Ross A. Kohler
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device with error correction capability and efficient partia...
- Patent number 8,156,402
- Issue date Apr 10, 2012
- Agere Systems Inc.
- Ross A. Kohler
- G11 - INFORMATION STORAGE
Information Patent Grant
Systematic error correction for multi-level flash memory
- Patent number 8,139,412
- Issue date Mar 20, 2012
- Agere Systems Inc.
- Ross A. Kohler
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and apparatus for testing a memory device
- Patent number 8,023,348
- Issue date Sep 20, 2011
- Agere Systems Inc.
- Ross A. Kohler
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and apparatus for increasing yield in a memory device
- Patent number 7,940,594
- Issue date May 10, 2011
- Agere Systems Inc.
- Richard Bruce Dell
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device with error correction capability and preemptive parti...
- Patent number 7,930,615
- Issue date Apr 19, 2011
- Agere Systems Inc.
- Ross A. Kohler
- G11 - INFORMATION STORAGE
Information Patent Grant
Accessing memory cells in a memory circuit
- Patent number 7,872,929
- Issue date Jan 18, 2011
- LSI Corporation
- Richard Bruce Dell
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and apparatus for hot carrier programmed one time programmab...
- Patent number 7,764,541
- Issue date Jul 27, 2010
- Agere Systems Inc.
- Ross Alan Kohler
- G11 - INFORMATION STORAGE
Information Patent Grant
Multiple-level memory with analog read
- Patent number 7,746,692
- Issue date Jun 29, 2010
- Agere Systems Inc.
- Ross A. Kohler
- G11 - INFORMATION STORAGE
Information Patent Grant
Dynamic random access memory with low-power refresh
- Patent number 7,742,355
- Issue date Jun 22, 2010
- Agere Systems Inc.
- Ross A. Kohler
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and apparatus for idle cycle refresh request in DRAM
- Patent number 7,613,061
- Issue date Nov 3, 2009
- Agere Systems Inc.
- Ross A. Kohler
- G11 - INFORMATION STORAGE
Information Patent Grant
Dual-port memory
- Patent number 7,551,512
- Issue date Jun 23, 2009
- Agere Systems Inc.
- Donald Albert Evans
- G11 - INFORMATION STORAGE
Information Patent Grant
Built-in self test for memory arrays using error correction coding
- Patent number 7,254,763
- Issue date Aug 7, 2007
- Agere Systems Inc.
- Duane Rodney Aadsen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for reducing leakage current in a read only me...
- Patent number 7,085,149
- Issue date Aug 1, 2006
- Agere Systems Inc.
- Dennis E. Dudeck
- G11 - INFORMATION STORAGE
Information Patent Grant
Apparatus and method for programming a one-time programmable memory...
- Patent number 7,002,829
- Issue date Feb 21, 2006
- Agere Systems Inc.
- Ranbir Singh
- G11 - INFORMATION STORAGE
Information Patent Grant
Read-only memory architecture
- Patent number 6,879,509
- Issue date Apr 12, 2005
- Agere Systems, INC
- Donald A. Evans
- G11 - INFORMATION STORAGE
Information Patent Grant
High speed low voltage semiconductor devices and method of fabrication
- Patent number 6,537,867
- Issue date Mar 25, 2003
- Agere Systems Inc.
- Ronald L. Freyman
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for forming programmable CMOS ROM devices
- Patent number 6,380,016
- Issue date Apr 30, 2002
- Ross Alan Kohler
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Sense amplifier for memory
- Patent number 6,219,278
- Issue date Apr 17, 2001
- Lucent Technologies Inc.
- Malcolm Harold Smith
- G11 - INFORMATION STORAGE
Information Patent Grant
Single-poly non-volatile memory cell having low-capacitance erase gate
- Patent number 6,191,980
- Issue date Feb 20, 2001
- Lucent Technologies, Inc.
- Patrick J. Kelley
- G11 - INFORMATION STORAGE
Information Patent Grant
Automated method of burn-in and endurance testing for embedded EEPROM
- Patent number 6,151,693
- Issue date Nov 21, 2000
- Lucent Technologies, Inc.
- Robert H. Arnold
- G11 - INFORMATION STORAGE
Information Patent Grant
Technique for recovering defective memory
- Patent number 5,857,069
- Issue date Jan 5, 1999
- Lucent Technologies Inc.
- Ross Alan Kohler
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
Enhancing Memory Yield Through Memory Subsystem Repair
- Publication number 20140169113
- Publication date Jun 19, 2014
- Ting Zhou
- G11 - INFORMATION STORAGE
Information Patent Application
REDUCING POWER CONSUMPTION OF MEMORY
- Publication number 20130173944
- Publication date Jul 4, 2013
- LSI CORPORATION
- Ross Kohler
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
High-Reliability Memory
- Publication number 20110055660
- Publication date Mar 3, 2011
- Dennis E. Dudeck
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Secure Random Number Generator
- Publication number 20110022648
- Publication date Jan 27, 2011
- Edward B. Harris
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Optimization of Circuits Having Repeatable Circuit Instances
- Publication number 20100301926
- Publication date Dec 2, 2010
- Richard Bruce Dell
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Integrated Circuit Self-Monitored Burn-In
- Publication number 20100271064
- Publication date Oct 28, 2010
- Ross A. Kohler
- G01 - MEASURING TESTING
Information Patent Application
Accessing Memory Cells in a Memory Circuit
- Publication number 20100271891
- Publication date Oct 28, 2010
- Richard Bruce Dell
- G11 - INFORMATION STORAGE
Information Patent Application
Method and Apparatus for Increasing Yield in a Memory Device
- Publication number 20100238751
- Publication date Sep 23, 2010
- Agere Systems Inc.
- Richard Bruce Dell
- G11 - INFORMATION STORAGE
Information Patent Application
SYSTEMATIC ERROR CORRECTION FOR MULTI-LEVEL FLASH MEMORY
- Publication number 20100229035
- Publication date Sep 9, 2010
- Agere Systems Inc.
- Ross A. Kohler
- G11 - INFORMATION STORAGE
Information Patent Application
Method and Apparatus for Testing a Memory Device
- Publication number 20100182859
- Publication date Jul 22, 2010
- Ross A. Kohler
- G11 - INFORMATION STORAGE
Information Patent Application
Memory Device with Error Correction Capability and Efficient Partia...
- Publication number 20100131825
- Publication date May 27, 2010
- Ross A. Kohler
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Multiple-Level Memory with Analog Read
- Publication number 20090196098
- Publication date Aug 6, 2009
- Ross A. Kohler
- G11 - INFORMATION STORAGE
Information Patent Application
Dynamic Random Access Memory With Low-Power Refresh
- Publication number 20090161459
- Publication date Jun 25, 2009
- Agere Systems Inc.
- Ross A. Kohler
- G11 - INFORMATION STORAGE
Information Patent Application
Method and Apparatus for Idle Cycle Refresh Request in Dram
- Publication number 20090141575
- Publication date Jun 4, 2009
- Ross A. Kohler
- G11 - INFORMATION STORAGE
Information Patent Application
Dual-Port Memory
- Publication number 20090034356
- Publication date Feb 5, 2009
- Donald Albert Evans
- G11 - INFORMATION STORAGE
Information Patent Application
Memory Device with Error Correction Capability and Preemptive Parti...
- Publication number 20080301526
- Publication date Dec 4, 2008
- Ross A. Kohler
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method And Apparatus For Hot Carrier Programmed One Time Programmab...
- Publication number 20070274126
- Publication date Nov 29, 2007
- Ross Alan Kohler
- G11 - INFORMATION STORAGE
Information Patent Application
Built-in self test for memory arrays using error correction coding
- Publication number 20060048031
- Publication date Mar 2, 2006
- Agere Systems, Inc.
- Duane Rodney Aadsen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and apparatus for reducing leakage current in a read only me...
- Publication number 20050162941
- Publication date Jul 28, 2005
- Dennis E. Dudeck
- G11 - INFORMATION STORAGE
Information Patent Application
Apparatus and method for programming a one-time programmable memory...
- Publication number 20050070052
- Publication date Mar 31, 2005
- Ranbir Singh
- G11 - INFORMATION STORAGE
Information Patent Application
Read-only memory architecture
- Publication number 20040233693
- Publication date Nov 25, 2004
- Agere Systems, Inc.
- Donald A. Evans
- G11 - INFORMATION STORAGE
Information Patent Application
METHOD FOR FORMING PROGRAMMABLE CMOS ROM DEVICES
- Publication number 20010011749
- Publication date Aug 9, 2001
- ROSS ALAN KOHLER
- H01 - BASIC ELECTRIC ELEMENTS

Ross Alan Kohler

Person

Patents Grantslast 30 patents

Secure random number generator

Optimization of circuits having repeatable circuit instances

High-reliability memory

Integrated circuit self-monitored burn-in

Memory device with error correction capability and efficient partia...

Systematic error correction for multi-level flash memory

Method and apparatus for testing a memory device

Method and apparatus for increasing yield in a memory device

Memory device with error correction capability and preemptive parti...

Accessing memory cells in a memory circuit

Method and apparatus for hot carrier programmed one time programmab...

Multiple-level memory with analog read

Dynamic random access memory with low-power refresh

Method and apparatus for idle cycle refresh request in DRAM

Dual-port memory

Built-in self test for memory arrays using error correction coding

Method and apparatus for reducing leakage current in a read only me...

Apparatus and method for programming a one-time programmable memory...

Read-only memory architecture

High speed low voltage semiconductor devices and method of fabrication

Method for forming programmable CMOS ROM devices

Sense amplifier for memory

Single-poly non-volatile memory cell having low-capacitance erase gate

Automated method of burn-in and endurance testing for embedded EEPROM

Technique for recovering defective memory

Patents Applicationslast 30 patents

Enhancing Memory Yield Through Memory Subsystem Repair

REDUCING POWER CONSUMPTION OF MEMORY

High-Reliability Memory

Secure Random Number Generator

Optimization of Circuits Having Repeatable Circuit Instances

Integrated Circuit Self-Monitored Burn-In

Accessing Memory Cells in a Memory Circuit

Method and Apparatus for Increasing Yield in a Memory Device

SYSTEMATIC ERROR CORRECTION FOR MULTI-LEVEL FLASH MEMORY

Method and Apparatus for Testing a Memory Device

Memory Device with Error Correction Capability and Efficient Partia...

Multiple-Level Memory with Analog Read

Dynamic Random Access Memory With Low-Power Refresh

Method and Apparatus for Idle Cycle Refresh Request in Dram

Dual-Port Memory

Memory Device with Error Correction Capability and Preemptive Parti...

Method And Apparatus For Hot Carrier Programmed One Time Programmab...

Built-in self test for memory arrays using error correction coding

Method and apparatus for reducing leakage current in a read only me...

Apparatus and method for programming a one-time programmable memory...

Read-only memory architecture

METHOD FOR FORMING PROGRAMMABLE CMOS ROM DEVICES