Sarah E. Kim

Person

Portland, OR, US

People

Patents Grantslast 30 patents

Information Patent Grant
Three-dimensional stacked substrate arrangements
- Patent number 8,421,225
- Issue date Apr 16, 2013
- Intel Corporation
- Shriram Ramanathan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Three-dimensional stacked substrate arrangements
- Patent number 8,203,208
- Issue date Jun 19, 2012
- Intel Corporation
- Shriram Ramanathan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Three-dimensional stacked substrate arrangements
- Patent number 7,973,407
- Issue date Jul 5, 2011
- Intel Corporation
- Shriram Ramanathan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Cooling micro-channels
- Patent number 7,842,553
- Issue date Nov 30, 2010
- Intel Corporation
- Sarah E. Kim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated re-combiner for electroosmotic pumps using porous frits
- Patent number 7,723,208
- Issue date May 25, 2010
- Intel Corporation
- Sarah E. Kim
- F04 - POSITIVE DISPLACEMENT MACHINES FOR LIQUIDS PUMPS FOR LIQUIDS OR ELASTIC...
Information Patent Grant
Method of forming a stack of heat generating integrated circuit chi...
- Patent number 7,696,015
- Issue date Apr 13, 2010
- Intel Corporation
- Sarah E. Kim
- F04 - POSITIVE DISPLACEMENT MACHINES FOR LIQUIDS PUMPS FOR LIQUIDS OR ELASTIC...
Information Patent Grant
Etch stop layer for silicon (Si) via etch in three-dimensional (3-D...
- Patent number 7,615,462
- Issue date Nov 10, 2009
- Intel Corporation
- Sarah E. Kim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Using external radiators with electroosmotic pumps for cooling inte...
- Patent number 7,576,432
- Issue date Aug 18, 2009
- Intel Corporation
- Sarah E. Kim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Microelectronic assembly having thermoelectric elements to cool a d...
- Patent number 7,537,954
- Issue date May 26, 2009
- Intel Corporation
- Shriram Ramanathan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method and structure for interfacing electronic devices
- Patent number 7,348,217
- Issue date Mar 25, 2008
- Intel Corporation
- Mauro J. Kobrinsky
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Packaged electroosmotic pumps using porous frits for cooling integr...
- Patent number 7,274,106
- Issue date Sep 25, 2007
- Intel Corporation
- Sarah E. Kim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Capacitor with insulating nanostructure
- Patent number 7,271,434
- Issue date Sep 18, 2007
- Intel Corporation
- Scot A. Kellar
- G11 - INFORMATION STORAGE
Information Patent Grant
Capacitor with conducting nanostructure
- Patent number 7,265,406
- Issue date Sep 4, 2007
- Intel Corporation
- Scot A. Kellar
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and device for on-chip decoupling capacitor using nanostruct...
- Patent number 7,244,983
- Issue date Jul 17, 2007
- Intel Corporation
- Sarah E. Kim
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Cooling micro-channels
- Patent number 7,227,257
- Issue date Jun 5, 2007
- Intel Corporation
- Sarah E. Kim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method and apparatus for low temperature copper to copper bonding
- Patent number 7,183,648
- Issue date Feb 27, 2007
- Intel Corporation
- Shriram Ramanathan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Process of vertically stacking multiple wafers supporting different...
- Patent number 7,157,787
- Issue date Jan 2, 2007
- Intel Corporation
- Sarah E. Kim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Etch stop layer for silicon (Si) via etch in three-dimensional (3-D...
- Patent number 7,148,565
- Issue date Dec 12, 2006
- Intel Corporation
- Sarah E. Kim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Self-aligned electrodes contained within the trenches of an electro...
- Patent number 7,105,382
- Issue date Sep 12, 2006
- Intel Corporation
- Alan M. Myers
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Differential planarization
- Patent number 7,105,925
- Issue date Sep 12, 2006
- Intel Corporation
- James A. Boardman
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Ultra-high capacitance device based on nanostructures
- Patent number 7,091,084
- Issue date Aug 15, 2006
- Intel Corporation
- Scot A. Kellar
- G11 - INFORMATION STORAGE
Information Patent Grant
Electroosmotic pumps using porous frits for cooling integrated circ...
- Patent number 7,084,495
- Issue date Aug 1, 2006
- Intel Corporation
- Sarah E. Kim
- F04 - POSITIVE DISPLACEMENT MACHINES FOR LIQUIDS PUMPS FOR LIQUIDS OR ELASTIC...
Information Patent Grant
Barrier structure against corrosion and contamination in three-dime...
- Patent number 7,056,807
- Issue date Jun 6, 2006
- Intel Corporation
- Scot A. Kellar
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods of forming backside connections on a wafer stack
- Patent number 7,056,813
- Issue date Jun 6, 2006
- Intel Corporation
- Patrick Morrow
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Wafer bonding using a flexible bladder press for three dimensional...
- Patent number 7,037,804
- Issue date May 2, 2006
- Intel Corporation
- Scot A. Kellar
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Microelectronic assembly having thermoelectric elements to cool a d...
- Patent number 7,034,394
- Issue date Apr 25, 2006
- Intel Corporation
- Shriram Ramanathan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Using external radiators with electroosmotic pumps for cooling inte...
- Patent number 6,992,381
- Issue date Jan 31, 2006
- Intel Corporation
- Sarah E. Kim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Electro-osmotic pumps and micro-channels
- Patent number 6,981,849
- Issue date Jan 3, 2006
- Intel Corporation
- Sarah E. Kim
- F04 - POSITIVE DISPLACEMENT MACHINES FOR LIQUIDS PUMPS FOR LIQUIDS OR ELASTIC...
Information Patent Grant
Thick metal layer integrated process flow to improve power delivery...
- Patent number 6,977,435
- Issue date Dec 20, 2005
- Intel Corporation
- Sarah E. Kim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Wafer bonding using a flexible bladder press and thinned wafers for...
- Patent number 6,975,016
- Issue date Dec 13, 2005
- Intel Corporation
- Scot A. Kellar
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
THREE-DIMENSIONAL STACKED SUBSTRATE ARRANGEMENTS
- Publication number 20120280387
- Publication date Nov 8, 2012
- Shriram Ramanathan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
THREE-DIMENSIONAL STACKED SUBSTRATE ARRANGEMENTS
- Publication number 20110260319
- Publication date Oct 27, 2011
- Shriram Ramanathan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Three-dimensional stacked substrate arrangements
- Publication number 20090174070
- Publication date Jul 9, 2009
- Shriram Ramanathan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Packaged electroosmotic pumps using porous frits for cooling integr...
- Publication number 20070278668
- Publication date Dec 6, 2007
- Sarah E. Kim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Cooling micro-channels
- Publication number 20070200226
- Publication date Aug 30, 2007
- Sarah E. Kim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Methods of Processing Thick ILD Layers Using Spray Coating or Lamin...
- Publication number 20070190776
- Publication date Aug 16, 2007
- Intel Corporation
- Sarah E. Kim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Process of vertically stacking multiple wafers supporting different...
- Publication number 20070111386
- Publication date May 17, 2007
- Sarah E. Kim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD AND STRUCTURE FOR VERTICALLY-STACKED DEVICE CONTACT
- Publication number 20070087528
- Publication date Apr 19, 2007
- Sarah E. Kim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Etch stop layer for silicon (Si) via etch in three-dimensional (3-D...
- Publication number 20070020805
- Publication date Jan 25, 2007
- Sarah E. Kim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method and structure for interfacing electronic devices
- Publication number 20070015340
- Publication date Jan 18, 2007
- Mauro J. Kobrinsky
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Electroosmotic pumps using porous frits for cooling integrated circ...
- Publication number 20060226541
- Publication date Oct 12, 2006
- Sarah E. Kim
- F04 - POSITIVE DISPLACEMENT MACHINES FOR LIQUIDS PUMPS FOR LIQUIDS OR ELASTIC...
Information Patent Application
Microelectronic assembly having thermoelectric elements to cool a d...
- Publication number 20060097383
- Publication date May 11, 2006
- Shriram Ramanathan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Thick metal layer integrated process flow to improve power delivery...
- Publication number 20060076678
- Publication date Apr 13, 2006
- Sarah E. Kim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Using external radiators with electroosmotic pumps for cooling inte...
- Publication number 20060055030
- Publication date Mar 16, 2006
- Sarah E. Kim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Methods of processing thick ILD layers using spray coating or lamin...
- Publication number 20060012039
- Publication date Jan 19, 2006
- Sarah E. Kim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Capacitor with conducting nanostructure
- Publication number 20050194628
- Publication date Sep 8, 2005
- Scot A. Kellar
- G11 - INFORMATION STORAGE
Information Patent Application
Method and structure for interfacing electronic devices
- Publication number 20050184400
- Publication date Aug 25, 2005
- Mauro J. Kobrinsky
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Differential planarization
- Publication number 20050170759
- Publication date Aug 4, 2005
- James A. Boardman
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Methods of forming backside connections on a wafer stack
- Publication number 20050164490
- Publication date Jul 28, 2005
- Patrick Morrow
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Ultra-high capacitance device based on nanostructures
- Publication number 20050151261
- Publication date Jul 14, 2005
- Scot A. Kellar
- G11 - INFORMATION STORAGE
Information Patent Application
Self-aligned electrodes contained within the trenches of an electro...
- Publication number 20050112816
- Publication date May 26, 2005
- Alan M. Myers
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method and device for on-chip decoupling capacitor using nanostruct...
- Publication number 20050101099
- Publication date May 12, 2005
- Sarah E. Kim
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
Using external radiators with electroosmotic pumps for cooling inte...
- Publication number 20050093138
- Publication date May 5, 2005
- Sarah E. Kim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Electroosmotic pumps using porous frits for cooling integrated circ...
- Publication number 20050085018
- Publication date Apr 21, 2005
- Sarah E. Kim
- F04 - POSITIVE DISPLACEMENT MACHINES FOR LIQUIDS PUMPS FOR LIQUIDS OR ELASTIC...
Information Patent Application
Microelectronic assembly having thermoelectric elements to cool a d...
- Publication number 20050077619
- Publication date Apr 14, 2005
- Shriram Ramanathan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Integrated re-combiner for electroosmotic pumps using porous frits
- Publication number 20050074953
- Publication date Apr 7, 2005
- Sarah E. Kim
- F04 - POSITIVE DISPLACEMENT MACHINES FOR LIQUIDS PUMPS FOR LIQUIDS OR ELASTIC...
Information Patent Application
Packaged electroosmotic pumps using porous frits for cooling integr...
- Publication number 20050062150
- Publication date Mar 24, 2005
- Sarah E. Kim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHODS OF FORMING BACKSIDE CONNECTIONS ON A WAFER STACK
- Publication number 20050059217
- Publication date Mar 17, 2005
- Patrick Morrow
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Thick metal layer integrated process flow to improve power delivery...
- Publication number 20050051894
- Publication date Mar 10, 2005
- Intel Corporation
- Sarah E. Kim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Methods of processing thick ILD layers using spray coating or lamin...
- Publication number 20050051904
- Publication date Mar 10, 2005
- Sarah E. Kim
- H01 - BASIC ELECTRIC ELEMENTS

Sarah E. Kim

Person

Patents Grantslast 30 patents

Three-dimensional stacked substrate arrangements

Three-dimensional stacked substrate arrangements

Three-dimensional stacked substrate arrangements

Cooling micro-channels

Integrated re-combiner for electroosmotic pumps using porous frits

Method of forming a stack of heat generating integrated circuit chi...

Etch stop layer for silicon (Si) via etch in three-dimensional (3-D...

Using external radiators with electroosmotic pumps for cooling inte...

Microelectronic assembly having thermoelectric elements to cool a d...

Method and structure for interfacing electronic devices

Packaged electroosmotic pumps using porous frits for cooling integr...

Capacitor with insulating nanostructure

Capacitor with conducting nanostructure

Method and device for on-chip decoupling capacitor using nanostruct...

Cooling micro-channels

Method and apparatus for low temperature copper to copper bonding

Process of vertically stacking multiple wafers supporting different...

Etch stop layer for silicon (Si) via etch in three-dimensional (3-D...

Self-aligned electrodes contained within the trenches of an electro...

Differential planarization

Ultra-high capacitance device based on nanostructures

Electroosmotic pumps using porous frits for cooling integrated circ...

Barrier structure against corrosion and contamination in three-dime...

Methods of forming backside connections on a wafer stack

Wafer bonding using a flexible bladder press for three dimensional...

Microelectronic assembly having thermoelectric elements to cool a d...

Using external radiators with electroosmotic pumps for cooling inte...

Electro-osmotic pumps and micro-channels

Thick metal layer integrated process flow to improve power delivery...

Wafer bonding using a flexible bladder press and thinned wafers for...

Patents Applicationslast 30 patents

THREE-DIMENSIONAL STACKED SUBSTRATE ARRANGEMENTS

THREE-DIMENSIONAL STACKED SUBSTRATE ARRANGEMENTS

Three-dimensional stacked substrate arrangements

Packaged electroosmotic pumps using porous frits for cooling integr...

Cooling micro-channels

Methods of Processing Thick ILD Layers Using Spray Coating or Lamin...

Process of vertically stacking multiple wafers supporting different...

METHOD AND STRUCTURE FOR VERTICALLY-STACKED DEVICE CONTACT

Etch stop layer for silicon (Si) via etch in three-dimensional (3-D...

Method and structure for interfacing electronic devices

Electroosmotic pumps using porous frits for cooling integrated circ...

Microelectronic assembly having thermoelectric elements to cool a d...

Thick metal layer integrated process flow to improve power delivery...

Using external radiators with electroosmotic pumps for cooling inte...

Methods of processing thick ILD layers using spray coating or lamin...

Capacitor with conducting nanostructure

Method and structure for interfacing electronic devices

Differential planarization

Methods of forming backside connections on a wafer stack

Ultra-high capacitance device based on nanostructures

Self-aligned electrodes contained within the trenches of an electro...

Method and device for on-chip decoupling capacitor using nanostruct...

Using external radiators with electroosmotic pumps for cooling inte...

Electroosmotic pumps using porous frits for cooling integrated circ...

Microelectronic assembly having thermoelectric elements to cool a d...

Integrated re-combiner for electroosmotic pumps using porous frits

Packaged electroosmotic pumps using porous frits for cooling integr...

METHODS OF FORMING BACKSIDE CONNECTIONS ON A WAFER STACK

Thick metal layer integrated process flow to improve power delivery...

Methods of processing thick ILD layers using spray coating or lamin...