Serge B. LASSERRE

Person

Plascassier, FR

People

Patents Grantslast 30 patents

Information Patent Grant
Master circuits having dynamic priority leads coupled with memory c...
- Patent number 9,141,561
- Issue date Sep 22, 2015
- Texas Instruments Incorporated
- Serge Bernard Lasserre
- G11 - INFORMATION STORAGE
Information Patent Grant
Dirty cache line write back policy based on stack size trend inform...
- Patent number 8,539,159
- Issue date Sep 17, 2013
- Texas Instruments Incorporated
- Gerard Chauvel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multi-processor computing system having a JAVA stack machine and a...
- Patent number 8,429,383
- Issue date Apr 23, 2013
- Texas Instruments Incorporated
- Gerard Chauvel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Micro-sequence based security model
- Patent number 8,190,861
- Issue date May 29, 2012
- Texas Instruments Incorporated
- Gerard Chauvel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Processing function connected to processor memory hierarchy
- Patent number 8,156,283
- Issue date Apr 10, 2012
- Texas Instruments Incorporated
- Eric L. P. Badi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Energy-aware scheduling of application execution
- Patent number 8,032,891
- Issue date Oct 4, 2011
- Texas Instruments Incorporated
- Gerard Chauvel
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Grant
Data processing apparatus, system and method
- Patent number 7,941,790
- Issue date May 10, 2011
- Texas Instruments Incorporated
- Gilbert Cabillic
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Mixed stack-based RISC processor
- Patent number 7,840,782
- Issue date Nov 23, 2010
- Texas Instruments Incorporated
- Gerard Chauvel
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Grant
Test and skip processor instruction having at least one register op...
- Patent number 7,840,784
- Issue date Nov 23, 2010
- Texas Instruments Incorporated
- Gerard Chauvel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Pre-decoding bytecode prefixes selectively incrementing stack machi...
- Patent number 7,757,067
- Issue date Jul 13, 2010
- Texas Instruments Incorporated
- Gerard Chauvel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Data transfer controlled by task attributes
- Patent number 7,712,098
- Issue date May 4, 2010
- Texas Instruments Incorporated
- Gerard Chauvel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Stack register reference control bit in source operand of instruction
- Patent number 7,634,643
- Issue date Dec 15, 2009
- Texas Instruments Incorporated
- Gerard Chauvel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Embedded garbage collection
- Patent number 7,565,385
- Issue date Jul 21, 2009
- Texas Instruments Incorporated
- Gerard Chauvel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory management of local variables upon a change of context
- Patent number 7,555,611
- Issue date Jun 30, 2009
- Texas Instruments Incorporated
- Serge Lasserre
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Unified memory management system for multi processor heterogeneous...
- Patent number 7,509,391
- Issue date Mar 24, 2009
- Texas Instruments Incorporated
- Gérard Chauvel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Accessing device driver memory in programming language representation
- Patent number 7,496,930
- Issue date Feb 24, 2009
- Texas Instruments Incorporated
- Gerard Chauvel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory allocation in a multi-processor system
- Patent number 7,434,021
- Issue date Oct 7, 2008
- Texas Instruments Incorporated
- Gerard Chauvel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Inter-processor control
- Patent number 7,434,029
- Issue date Oct 7, 2008
- Texas Instruments Incorporated
- Gerard Chauvel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Smart cache
- Patent number 7,386,671
- Issue date Jun 10, 2008
- Texas Instruments Incorporated
- Gérard Chauvel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Using IMPDEP2 for system commands related to Java accelerator hardware
- Patent number 7,360,060
- Issue date Apr 15, 2008
- Texas Instruments Incorporated
- Gerard Chauvel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Management of stack-based memory usage in a processor
- Patent number 7,330,937
- Issue date Feb 12, 2008
- Texas Instruments Incorporated
- Gerard Chauvel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Synchronizing stack storage
- Patent number 7,162,586
- Issue date Jan 9, 2007
- Texas Instruments Incorporated
- Gerard Chauvel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Processor with a split stack
- Patent number 7,058,765
- Issue date Jun 6, 2006
- Texas Instruments Incorporated
- Gerard Chauvel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Cache coherency in a multi-processor system
- Patent number 6,996,683
- Issue date Feb 7, 2006
- Texas Instruments Incorporated
- Gerard Chauvel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Local memory with indicator bits to support concurrent DMA and CPU...
- Patent number 6,968,400
- Issue date Nov 22, 2005
- Texas Instruments Incorporated
- Serge Lasserre
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Traffic controller using priority and burst control for reducing ac...
- Patent number 6,934,820
- Issue date Aug 23, 2005
- Texas Instruments Incorporated
- Gérard Chauvel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Fault management and recovery based on task-ID
- Patent number 6,851,072
- Issue date Feb 1, 2005
- Texas Instruments Incorporated
- Serge Lasserre
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Smart cache
- Patent number 6,826,652
- Issue date Nov 30, 2004
- Texas Instruments Incorporated
- Gérard Chauvel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Cache with multiple fill modes
- Patent number 6,792,508
- Issue date Sep 14, 2004
- Texas Instruments Incorporated
- Gérard Chauvel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Cache and DMA with a global valid bit
- Patent number 6,789,172
- Issue date Sep 7, 2004
- Texas Instruments Incorporated
- Gerard Chauvel
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
DYNAMIC PRIORITY MANAGEMENT OF MEMORY ACCESS
- Publication number 20140122790
- Publication date May 1, 2014
- TEXAS INSTRUMENTS INCORPORATED
- Serge Bernard Lasserre
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROCESSING FUNCTION CONNECTED TO PROCESSOR MEMORY HIERARCHY
- Publication number 20080282033
- Publication date Nov 13, 2008
- TEXAS INSTRUMENTS INCORPORATED
- Eric L. P. BADI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Dynamically changing the semantic of an instruction
- Publication number 20050033945
- Publication date Feb 10, 2005
- Gerard Chauvel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Memory allocation in a multi-processor system
- Publication number 20040268076
- Publication date Dec 30, 2004
- Gerard Chauvel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Embedded garbage collection
- Publication number 20040260732
- Publication date Dec 23, 2004
- Gerard Chauvel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Management of stack-based memory usage in a processor
- Publication number 20040260904
- Publication date Dec 23, 2004
- Gerard Chauvel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Smart cache
- Publication number 20040260881
- Publication date Dec 23, 2004
- Gerard Chauvel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Accessing device driver memory in programming language representation
- Publication number 20040261085
- Publication date Dec 23, 2004
- Gerard Chauvel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Unresolved instruction resolution
- Publication number 20040260911
- Publication date Dec 23, 2004
- Gerard Chauvel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Test and skip processor instruction having at least one register op...
- Publication number 20040153885
- Publication date Aug 5, 2004
- TEXAS INSTRUMENTS INCORPORATED
- Gerard Chauvel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Inter-processor control
- Publication number 20040088524
- Publication date May 6, 2004
- TEXAS INSTRUMENTS INCORPORATED
- Gerard Chauvel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Multi-processor computing system having a JAVA stack machine and a...
- Publication number 20040078550
- Publication date Apr 22, 2004
- TEXAS INSTRUMENTS INCORPORATED
- Gerard Chauvel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Memory management of local variables upon a change of context
- Publication number 20040078522
- Publication date Apr 22, 2004
- TEXAS INSTRUMENTS INCORPORATED
- Serge Lasserre
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Cache coherency in a multi-processor system
- Publication number 20040078528
- Publication date Apr 22, 2004
- TEXAS INSTRUMENTS INCORPORATED
- Gerard Chauvel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Processor with a split stack
- Publication number 20040078557
- Publication date Apr 22, 2004
- TEXAS INSTRUMENTS INCORPORATED
- Gerard Chauvel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Program counter adjustment based on the detection of an instruction...
- Publication number 20040078552
- Publication date Apr 22, 2004
- Texas Instrument Incorporated
- Gerard Chauvel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Synchronizing stack storage
- Publication number 20040078531
- Publication date Apr 22, 2004
- TEXAS INSTRUMENTS INCORPORATED
- Gerard Chauvel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Processor that accommodates multiple instruction sets and multiple...
- Publication number 20040024990
- Publication date Feb 5, 2004
- TEXAS INSTRUMENTS INCORPORATED
- Gerard Chauvel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Test with immediate and skip processor instruction
- Publication number 20040024997
- Publication date Feb 5, 2004
- TEXAS INSTRUMENTS INCORPORATED
- Gerard Chauvel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Mixed stack-based RISC processor
- Publication number 20040024989
- Publication date Feb 5, 2004
- Texas Instruments Incorporated
- Gerard Chauvel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Write back policy for memory
- Publication number 20040024792
- Publication date Feb 5, 2004
- TEXAS INSTRUMENTS INCORPORATED
- Gerard Chauvel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Methods and apparatuses for managing memory
- Publication number 20040024969
- Publication date Feb 5, 2004
- TEXAS INSTRUMENTS INCORPORATED
- Gerard Chauvel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Micro-sequence execution in a processor
- Publication number 20040024999
- Publication date Feb 5, 2004
- TEXAS INSTRUMENTS INCORPORATED
- Gerard Chauvel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Synchronization of processor states
- Publication number 20040024988
- Publication date Feb 5, 2004
- TEXAS INSTRUMENTS INCORPORATED
- Gerard Chauvel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Using IMPDEP2 for system commands related to Java accelator hardware
- Publication number 20040024991
- Publication date Feb 5, 2004
- TEXAS INSTRUMENTS INCORPORATED
- Gerard Chauvel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Methods and apparatuses for managing memory
- Publication number 20040024970
- Publication date Feb 5, 2004
- TEXAS INSTRUMENTS INCORPORATED
- Gerard Chauvel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Application execution profiling in conjunction with a virtual machine
- Publication number 20040010785
- Publication date Jan 15, 2004
- Gerard Chauvel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Energy-aware scheduling of application execution
- Publication number 20030217090
- Publication date Nov 20, 2003
- Gerard Chauvel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Data transfer controlled by task attributes
- Publication number 20030097394
- Publication date May 22, 2003
- Gerard Chauvel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Interruptible and re-entrant cache clean range instruction
- Publication number 20030097550
- Publication date May 22, 2003
- Gerard Chauvel
- G06 - COMPUTING CALCULATING COUNTING

Serge B. LASSERRE

Person

Patents Grantslast 30 patents

Master circuits having dynamic priority leads coupled with memory c...

Dirty cache line write back policy based on stack size trend inform...

Multi-processor computing system having a JAVA stack machine and a...

Micro-sequence based security model

Processing function connected to processor memory hierarchy

Energy-aware scheduling of application execution

Data processing apparatus, system and method

Mixed stack-based RISC processor

Test and skip processor instruction having at least one register op...

Pre-decoding bytecode prefixes selectively incrementing stack machi...

Data transfer controlled by task attributes

Stack register reference control bit in source operand of instruction

Embedded garbage collection

Memory management of local variables upon a change of context

Unified memory management system for multi processor heterogeneous...

Accessing device driver memory in programming language representation

Memory allocation in a multi-processor system

Inter-processor control

Smart cache

Using IMPDEP2 for system commands related to Java accelerator hardware

Management of stack-based memory usage in a processor

Synchronizing stack storage

Processor with a split stack

Cache coherency in a multi-processor system

Local memory with indicator bits to support concurrent DMA and CPU...

Traffic controller using priority and burst control for reducing ac...

Fault management and recovery based on task-ID

Smart cache

Cache with multiple fill modes

Cache and DMA with a global valid bit

Patents Applicationslast 30 patents

DYNAMIC PRIORITY MANAGEMENT OF MEMORY ACCESS

PROCESSING FUNCTION CONNECTED TO PROCESSOR MEMORY HIERARCHY

Dynamically changing the semantic of an instruction

Memory allocation in a multi-processor system

Embedded garbage collection

Management of stack-based memory usage in a processor

Smart cache

Accessing device driver memory in programming language representation

Unresolved instruction resolution

Test and skip processor instruction having at least one register op...

Inter-processor control

Multi-processor computing system having a JAVA stack machine and a...

Memory management of local variables upon a change of context

Cache coherency in a multi-processor system

Processor with a split stack

Program counter adjustment based on the detection of an instruction...

Synchronizing stack storage

Processor that accommodates multiple instruction sets and multiple...

Test with immediate and skip processor instruction

Mixed stack-based RISC processor

Write back policy for memory

Methods and apparatuses for managing memory

Micro-sequence execution in a processor

Synchronization of processor states

Using IMPDEP2 for system commands related to Java accelator hardware

Methods and apparatuses for managing memory

Application execution profiling in conjunction with a virtual machine

Energy-aware scheduling of application execution

Data transfer controlled by task attributes

Interruptible and re-entrant cache clean range instruction