Shailesh Kumar

Person

Ghaziabad, IN

People

Patents Grantslast 30 patents

Information Patent Grant
Integrated circuit die with corner IO pads
- Patent number 9,633,959
- Issue date Apr 25, 2017
- FREESCALE SEMICONDUCTOR, INC.
- Shailesh Kumar
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit with on-die decoupling capacitors
- Patent number 9,418,873
- Issue date Aug 16, 2016
- FREESCALE SEMICONDUCTOR, INC.
- Shailesh Kumar
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Signal bond wire shield
- Patent number 9,337,140
- Issue date May 10, 2016
- FREESCALE SEMICONDUCTOR, INC.
- Shailesh Kumar
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Lead frame with power and ground bars
- Patent number 9,299,646
- Issue date Mar 29, 2016
- Freescale Semiconductor,INC
- Shailesh Kumar
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device having power distribution using bond wires
- Patent number 9,196,598
- Issue date Nov 24, 2015
- FREESCALE SEMICONDUCTOR, INC.
- Shailesh Kumar
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Bond pad for semiconductor die
- Patent number 8,242,613
- Issue date Aug 14, 2012
- FREESCALE SEMICONDUCTOR, INC.
- Chetan Verma
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method and system for calculating interlace artifact in motion pict...
- Patent number 8,049,817
- Issue date Nov 1, 2011
- Interra Systems Inc
- Shekhar Madnani
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Method for verification of file-based media content
- Patent number 8,001,486
- Issue date Aug 16, 2011
- Interra Systems, Inc
- Shailesh Kumar
- H04 - ELECTRIC COMMUNICATION TECHNIQUE

Patents Applicationslast 30 patents

Information Patent Application
PACKAGE BUMPS OF A PACKAGE SUBSTRATE
- Publication number 20240203860
- Publication date Jun 20, 2024
- QUALCOMM Incorporated
- Ashish RAJ
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT DIE WITH CORNER IO PADS
- Publication number 20160233183
- Publication date Aug 11, 2016
- Shailesh Kumar
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT PACKAGE WITH POWER PLATES
- Publication number 20160163671
- Publication date Jun 9, 2016
- FREESCALE SEMICONDUCTOR, INC.
- SHAILESH KUMAR
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT WITH ON-DIE DECOUPLING CAPACITORS
- Publication number 20160056099
- Publication date Feb 25, 2016
- FREESCALE SEMICONDUCTOR, INC.
- Shailesh Kumar
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR DEVICE HAVING POWER DISTRIBUTION USING BOND WIRES
- Publication number 20150364439
- Publication date Dec 17, 2015
- FREESCALE SEMICONDUCTOR, INC.
- Shailesh Kumar
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR DEVICE WITH PACKAGE-LEVEL DECOUPLING CAPACITORS FORME...
- Publication number 20150221592
- Publication date Aug 6, 2015
- Chetan Verma
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
POWER PLANE FOR MULTI-LAYERED SUBSTRATE
- Publication number 20140339687
- Publication date Nov 20, 2014
- Shailesh Kumar
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
BOND PAD FOR SEMICONDUCTOR DIE
- Publication number 20120049389
- Publication date Mar 1, 2012
- FREESCALE SEMICONDUCTOR, INC.
- Chetan Verma
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method and system for calculating interlace artifact in motion pict...
- Publication number 20100085475
- Publication date Apr 8, 2010
- Shekhar Madnani
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Method for verification of file-based media content
- Publication number 20080301588
- Publication date Dec 4, 2008
- Shailesh Kumar
- H04 - ELECTRIC COMMUNICATION TECHNIQUE

Shailesh Kumar

Person

Patents Grantslast 30 patents

Integrated circuit die with corner IO pads

Integrated circuit with on-die decoupling capacitors

Signal bond wire shield

Lead frame with power and ground bars

Semiconductor device having power distribution using bond wires

Bond pad for semiconductor die

Method and system for calculating interlace artifact in motion pict...

Method for verification of file-based media content

Patents Applicationslast 30 patents

PACKAGE BUMPS OF A PACKAGE SUBSTRATE

INTEGRATED CIRCUIT DIE WITH CORNER IO PADS

INTEGRATED CIRCUIT PACKAGE WITH POWER PLATES

INTEGRATED CIRCUIT WITH ON-DIE DECOUPLING CAPACITORS

SEMICONDUCTOR DEVICE HAVING POWER DISTRIBUTION USING BOND WIRES

SEMICONDUCTOR DEVICE WITH PACKAGE-LEVEL DECOUPLING CAPACITORS FORME...

POWER PLANE FOR MULTI-LAYERED SUBSTRATE

BOND PAD FOR SEMICONDUCTOR DIE

Method and system for calculating interlace artifact in motion pict...

Method for verification of file-based media content