SHEKHAR PRAMANICK

Person

FREEMONT, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Self-aligned semiconductor interconnect barrier and manufacturing m...
- Patent number 6,734,559
- Issue date May 11, 2004
- Advanced Micro Devices, Inc.
- Kai Yang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Transistor with local insulator structure
- Patent number 6,670,260
- Issue date Dec 30, 2003
- Advanced Micro Devices, Inc.
- Bin Yu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of forming reliable capped copper interconnects
- Patent number 6,660,634
- Issue date Dec 9, 2003
- Advanced Micro Devices, Inc.
- Minh Van Ngo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
T-shaped gate device and method for making
- Patent number 6,596,598
- Issue date Jul 22, 2003
- Advanced Micro Devices, Inc.
- Zoran Krivokapic
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of forming reliable capped copper interconnects
- Patent number 6,492,266
- Issue date Dec 10, 2002
- Advanced Micro Devices, Inc.
- Minh Van Ngo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Prevention of inter-channel current leakage in semiconductors
- Patent number 6,465,345
- Issue date Oct 15, 2002
- Advanced Micro Devices, Inc.
- Takeshi Nogami
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Manufacturing method for semiconductor interconnect barrier of boro...
- Patent number 6,465,341
- Issue date Oct 15, 2002
- Advanced Micro Devices, Inc.
- Shekhar Pramanick
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of manufacturing a transistor with local insulator structure
- Patent number 6,380,019
- Issue date Apr 30, 2002
- Advanced Micro Devices, Inc.
- Bin Yu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor interconnect barrier and manufacturing method thereof
- Patent number 6,380,625
- Issue date Apr 30, 2002
- Advanced Micro Devices, Inc.
- Shekhar Pramanick
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Test structure used to measure metal bottom coverage in trenches an...
- Patent number 6,380,556
- Issue date Apr 30, 2002
- Advanced Micro Devices, Inc.
- David Bang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Self-aligned SOI device with body contact and NiSi2 gate
- Patent number 6,372,563
- Issue date Apr 16, 2002
- Advanced Micro Devices, Inc.
- Zoran Krivokapic
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Low resistance composite contact structure utilizing a reaction bar...
- Patent number 6,369,429
- Issue date Apr 9, 2002
- Advanced Micro Devices, Inc.
- Shekhar Pramanick
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Formation of low thermal budget shallow abrupt junctions for semico...
- Patent number 6,362,063
- Issue date Mar 26, 2002
- Advanced Micro Devices, Inc.
- Witold P. Maszara
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method and system for modifying and densifying a porous film
- Patent number 6,361,837
- Issue date Mar 26, 2002
- Advanced Micro Devices, Inc.
- Suzette K. Pangrle
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Alloy barrier layers for semiconductors
- Patent number 6,362,526
- Issue date Mar 26, 2002
- Advanced Micro Devices, Inc.
- Shekhar Pramanick
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Chemical-mechanical polishing of semiconductors
- Patent number 6,350,678
- Issue date Feb 26, 2002
- Advanced Micro Devices, Inc.
- Shekhar Pramanick
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Manufacturing method for semiconductor metalization barrier
- Patent number 6,344,410
- Issue date Feb 5, 2002
- Advanced Micro Devices, Inc.
- Sergey D. Lopatin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Barrier materials for metal interconnect in a semiconductor device
- Patent number 6,344,691
- Issue date Feb 5, 2002
- Advanced Micro Devices, Inc.
- John A. Iacoponi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Copper interconnect with improved electromigration resistance
- Patent number 6,303,505
- Issue date Oct 16, 2001
- Advanced Micro Devices, Inc.
- Minh Van Ngo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor interconnect barrier of boron silicon nitride and man...
- Patent number 6,288,448
- Issue date Sep 11, 2001
- Advanced Micro Devices, Inc.
- Shekhar Pramanick
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Multi-layered coaxial interconnect structure
- Patent number 6,281,587
- Issue date Aug 28, 2001
- Advanced Micro Devices, Inc.
- Takeshi Nogami
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Dual barrier and conductor deposition in a dual damascene process f...
- Patent number 6,239,021
- Issue date May 29, 2001
- Advanced Micro Devices, Inc.
- Shekhar Pramanick
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Self-aligned silicide gate technology for advanced deep submicron M...
- Patent number 6,239,452
- Issue date May 29, 2001
- Advanced Micro Devices, Inc.
- Qi Xiang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of fabricating an integrated circuit having punch-through su...
- Patent number 6,221,724
- Issue date Apr 24, 2001
- Advanced Micro Devices, Inc.
- Bin Yu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Copper metalization with improved electromigration resistance
- Patent number 6,214,731
- Issue date Apr 10, 2001
- Advanced Micro Devices, Inc.
- Takeshi Nogami
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of forming reliable copper interconnects
- Patent number 6,211,084
- Issue date Apr 3, 2001
- Advanced Micro Devices, Inc.
- Minh Van Ngo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of forming a MOSFET transistor with a shallow abrupt retrogr...
- Patent number 6,184,112
- Issue date Feb 6, 2001
- Advanced Micro Devices, Inc.
- Witold P. Maszara
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Low resistance salicide technology with reduced silicon consumption
- Patent number 6,180,469
- Issue date Jan 30, 2001
- Advanced Micro Devices, Inc.
- Shekhar Pramanick
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Low energy passivation of conductive material in damascene process...
- Patent number 6,171,949
- Issue date Jan 9, 2001
- Advanced Micro Devices, Inc.
- Lu You
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device having an intermetallic layer on metal interco...
- Patent number 6,172,421
- Issue date Jan 9, 2001
- Advanced Micro Devices, Inc.
- Paul Raymond Besser
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
Pad structure for copper interconnection and its formation
- Publication number 20020005582
- Publication date Jan 17, 2002
- Takeshi Nogami
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR INTERCONNECT BARRIER AND MANUFACTURING METHOD THEREOF
- Publication number 20010042917
- Publication date Nov 22, 2001
- SHEKHAR PRAMANICK
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD AND SYSTEM FOR MODIFYING AND DENSIFYING A POROUS FILM
- Publication number 20010038889
- Publication date Nov 8, 2001
- SUZETTE K. PANGRLE
- H01 - BASIC ELECTRIC ELEMENTS

SHEKHAR PRAMANICK

Person

Patents Grantslast 30 patents

Self-aligned semiconductor interconnect barrier and manufacturing m...

Transistor with local insulator structure

Method of forming reliable capped copper interconnects

T-shaped gate device and method for making

Method of forming reliable capped copper interconnects

Prevention of inter-channel current leakage in semiconductors

Manufacturing method for semiconductor interconnect barrier of boro...

Method of manufacturing a transistor with local insulator structure

Semiconductor interconnect barrier and manufacturing method thereof

Test structure used to measure metal bottom coverage in trenches an...

Self-aligned SOI device with body contact and NiSi2 gate

Low resistance composite contact structure utilizing a reaction bar...

Formation of low thermal budget shallow abrupt junctions for semico...

Method and system for modifying and densifying a porous film

Alloy barrier layers for semiconductors

Chemical-mechanical polishing of semiconductors

Manufacturing method for semiconductor metalization barrier

Barrier materials for metal interconnect in a semiconductor device

Copper interconnect with improved electromigration resistance

Semiconductor interconnect barrier of boron silicon nitride and man...

Multi-layered coaxial interconnect structure

Dual barrier and conductor deposition in a dual damascene process f...

Self-aligned silicide gate technology for advanced deep submicron M...

Method of fabricating an integrated circuit having punch-through su...

Copper metalization with improved electromigration resistance

Method of forming reliable copper interconnects

Method of forming a MOSFET transistor with a shallow abrupt retrogr...

Low resistance salicide technology with reduced silicon consumption

Low energy passivation of conductive material in damascene process...

Semiconductor device having an intermetallic layer on metal interco...

Patents Applicationslast 30 patents

Pad structure for copper interconnection and its formation

SEMICONDUCTOR INTERCONNECT BARRIER AND MANUFACTURING METHOD THEREOF

METHOD AND SYSTEM FOR MODIFYING AND DENSIFYING A POROUS FILM