Shigeru Mori

Person

Hyogo, JP

People

Patents Grantslast 30 patents

Information Patent Grant
Semiconductor memory device with spare memory cell
- Patent number 6,134,681
- Issue date Oct 17, 2000
- Mitsubishi Denki Kabushiki Kaisha
- Hiroshi Akamatsu
- G11 - INFORMATION STORAGE
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Synchronous semiconductor memory device capable of reducing electri...
- Patent number 5,926,434
- Issue date Jul 20, 1999
- Mitsubishi Denki Kabushiki Kaisha
- Shigeru Mori
- G11 - INFORMATION STORAGE
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Semiconductor device capable of preventing fluctuations of substrat...
- Patent number 5,815,032
- Issue date Sep 29, 1998
- Mitsubishi Denki Kabushiki Kaisha
- Takuya Ariki
- G11 - INFORMATION STORAGE
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Synchronous type semiconductor memory device which can be adapted t...
- Patent number 5,703,829
- Issue date Dec 30, 1997
- Mitsubishi Denki Kabushiki Kaisha
- Tomio Suzuki
- G11 - INFORMATION STORAGE
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Pulse generating circuit and a semiconductor memory device provided...
- Patent number 5,691,661
- Issue date Nov 25, 1997
- Mitsubishi Denki Kabushiki Kaisha
- Tatsuya Fukuda
- G11 - INFORMATION STORAGE
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Dynamic random access memory with isolated well structure
- Patent number RE35613
- Issue date Sep 23, 1997
- Mitsubishi Denki Kabushiki Kaisha
- Kenichi Yasuda
- 257 - Active solid-state devices
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Semiconductor memory device capable of operating with potentials of...
- Patent number 5,654,924
- Issue date Aug 5, 1997
- Mitsubishi Denki Kabushiki Kaisha
- Tomio Suzuki
- G11 - INFORMATION STORAGE
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Semiconductor memory device having extended data out function
- Patent number 5,617,362
- Issue date Apr 1, 1997
- Mitsubishi Denki Kabushiki Kaisha
- Shigeru Mori
- G11 - INFORMATION STORAGE
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Semiconductor memory device
- Patent number 5,608,682
- Issue date Mar 4, 1997
- Mitsubishi Denki Kabushiki Kaisha
- Shinichi Jinbo
- G11 - INFORMATION STORAGE
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Oscillator circuit generating a clock signal having a temperature d...
- Patent number 5,600,281
- Issue date Feb 4, 1997
- Mitsubishi Denki Kabushiki Kaisha
- Shigeru Mori
- G11 - INFORMATION STORAGE
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Power supply circuit for generating an internal power supply potent...
- Patent number 5,587,648
- Issue date Dec 24, 1996
- Mitsubishi Denki Kabushiki Kaisha
- Shinichi Jinbo
- G11 - INFORMATION STORAGE
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Redundancy circuit for repairing defective bits in semiconductor me...
- Patent number 5,574,729
- Issue date Nov 12, 1996
- Mitsubishi Denki Kabushiki Kaisha
- Mitsuya Kinoshita
- G11 - INFORMATION STORAGE
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Semiconductor memory device having extended data out function
- Patent number 5,532,961
- Issue date Jul 2, 1996
- Mitsubishi Denki Kabushiki Kaisha
- Shigeru Mori
- G11 - INFORMATION STORAGE
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Semiconductor device having an improved immunity to a short-circuit...
- Patent number 5,519,650
- Issue date May 21, 1996
- Mitsubishi Electric Engineering Co., Ltd.
- Tooru Ichimura
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Oscillator circuit generating a clock signal having a temperature d...
- Patent number 5,499,214
- Issue date Mar 12, 1996
- Mitsubishi Denki Kabushiki Kaisha
- Shigeru Mori
- G11 - INFORMATION STORAGE
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Pulse generating circuit with temperature compensation
- Patent number 5,465,063
- Issue date Nov 7, 1995
- Mitsubishi Denki Kabushiki Kaisha
- Tatsuya Fukuda
- G11 - INFORMATION STORAGE
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Semiconductor integrated circuit device with an internal voltage-do...
- Patent number 5,451,896
- Issue date Sep 19, 1995
- Mitsubishi Denki Kabushiki Kaisha
- Shigeru Mori
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Internal power supply circuit for generating internal power supply...
- Patent number 5,442,277
- Issue date Aug 15, 1995
- Mitsubishi Denki Kabushiki Kaisha
- Shigeru Mori
- G05 - CONTROLLING REGULATING
Information Patent Grant
Semiconductor memory device comprising a test circuit and a method...
- Patent number 5,436,911
- Issue date Jul 25, 1995
- Mitsubishi Denki Kabushiki Kaisha
- Shigeru Mori
- G11 - INFORMATION STORAGE
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Semiconductor memory device comprising a test circuit and a method...
- Patent number 5,384,784
- Issue date Jan 24, 1995
- Mitsubishi Denki Kabushiki Kaisha
- Shigeru Mori
- G11 - INFORMATION STORAGE
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Intermediate voltage generating circuit having low output impedance
- Patent number 5,369,354
- Issue date Nov 29, 1994
- Mitsubishi Denki Kabushiki Kaisha
- Shigeru Mori
- G05 - CONTROLLING REGULATING
Information Patent Grant
Semiconductor integrated circuit device including a plurality of ce...
- Patent number 5,357,478
- Issue date Oct 18, 1994
- Mitsubishi Denki Kabushiki Kaisha
- Shigeru Kikuda
- G11 - INFORMATION STORAGE
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Circuit for applying selected voltages to dynamic random access memory
- Patent number 5,337,272
- Issue date Aug 9, 1994
- Mitsubishi Denki Kabushiki Kaisha
- Makoto Suwa
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Semiconductor memory device having multiple memory arrays and inclu...
- Patent number 5,323,348
- Issue date Jun 21, 1994
- Mitsubishi Denki Kabushiki Kaisha
- Shigeru Mori
- G11 - INFORMATION STORAGE
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Dynamic semiconductor memory device having separate read and write...
- Patent number 5,323,349
- Issue date Jun 21, 1994
- Mitsubishi Denki Kabushiki Kaisha
- Kei Hamade
- G11 - INFORMATION STORAGE
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Semiconductor device having no through current flow in standby period
- Patent number 5,321,654
- Issue date Jun 14, 1994
- Mitsubishi Denki Kabushiki Kaisha
- Hiroshi Miyamoto
- G11 - INFORMATION STORAGE
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Semiconductor memory device and method of testing the same
- Patent number 5,305,261
- Issue date Apr 19, 1994
- Mitsubishi Denki Kabushiki Kaisha
- Kiyohiro Furutani
- G11 - INFORMATION STORAGE
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Semiconductor memory device capable of repairing defective bits
- Patent number 5,299,160
- Issue date Mar 29, 1994
- Mitsubishi Denki Kabushiki Kaisha
- Shigeru Mori
- G11 - INFORMATION STORAGE
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Dynamic random access memory with isolated well structure
- Patent number 5,281,842
- Issue date Jan 25, 1994
- Mitsubishi Denki Kabushiki Kaisha
- Kenichi Yasuda
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor memory device including a redundancy circuitry for re...
- Patent number 5,146,429
- Issue date Sep 8, 1992
- Mitsubishi Denki Kabushiki Kaisha
- Shinji Kawai
- G11 - INFORMATION STORAGE

Shigeru Mori

Person

Patents Grantslast 30 patents

Semiconductor memory device with spare memory cell

Synchronous semiconductor memory device capable of reducing electri...

Semiconductor device capable of preventing fluctuations of substrat...

Synchronous type semiconductor memory device which can be adapted t...

Pulse generating circuit and a semiconductor memory device provided...

Dynamic random access memory with isolated well structure

Semiconductor memory device capable of operating with potentials of...

Semiconductor memory device having extended data out function

Semiconductor memory device

Oscillator circuit generating a clock signal having a temperature d...

Power supply circuit for generating an internal power supply potent...

Redundancy circuit for repairing defective bits in semiconductor me...

Semiconductor memory device having extended data out function

Semiconductor device having an improved immunity to a short-circuit...

Oscillator circuit generating a clock signal having a temperature d...

Pulse generating circuit with temperature compensation

Semiconductor integrated circuit device with an internal voltage-do...

Internal power supply circuit for generating internal power supply...

Semiconductor memory device comprising a test circuit and a method...

Semiconductor memory device comprising a test circuit and a method...

Intermediate voltage generating circuit having low output impedance

Semiconductor integrated circuit device including a plurality of ce...

Circuit for applying selected voltages to dynamic random access memory

Semiconductor memory device having multiple memory arrays and inclu...

Dynamic semiconductor memory device having separate read and write...

Semiconductor device having no through current flow in standby period

Semiconductor memory device and method of testing the same

Semiconductor memory device capable of repairing defective bits

Dynamic random access memory with isolated well structure

Semiconductor memory device including a redundancy circuitry for re...