Shreepad Amar Panth

Person

Atlanta, GA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Hard macro having blockage sites, integrated circuit including same...
- Patent number 11,004,780
- Issue date May 11, 2021
- QUALCOMM Incorporated
- Kambiz Samadi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Hard macro having blockage sites, integrated circuit including same...
- Patent number 10,510,651
- Issue date Dec 17, 2019
- QUALCOMM Incorporated
- Kambiz Samadi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Hard macro having blockage sites, integrated circuit including same...
- Patent number 10,192,813
- Issue date Jan 29, 2019
- QUALCOMM Incorporated
- Kambiz Samadi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Placement of monolithic inter-tier vias (MIVs) within monolithic th...
- Patent number 9,123,721
- Issue date Sep 1, 2015
- QUALCOMM Incorporated
- Kambiz Samadi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Clock distribution network for 3D integrated circuit
- Patent number 9,098,666
- Issue date Aug 4, 2015
- QUALCOMM Incorporated
- Kambiz Samadi
- G11 - INFORMATION STORAGE
Information Patent Grant
3D floorplanning using 2D and 3D blocks
- Patent number 9,064,077
- Issue date Jun 23, 2015
- QUALCOMM Incorporated
- Kambiz Samadi
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
HARD MACRO HAVING BLOCKAGE SITES, INTEGRATED CIRCUIT INCLUDING SAME...
- Publication number 20200105652
- Publication date Apr 2, 2020
- QUALCOMM Incorporated
- Kambiz Samadi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
HARD MACRO HAVING BLOCKAGE SITES, INTEGRATED CIRCUIT INCLUDING SAME...
- Publication number 20190122973
- Publication date Apr 25, 2019
- QUALCOMM Incorporated
- Kambiz Samadi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PLACEMENT OF MONOLITHIC INTER-TIER VIAS (MIVs) WITHIN MONOLITHIC TH...
- Publication number 20150333005
- Publication date Nov 19, 2015
- QUALCOMM Incorporated
- Kambiz Samadi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PLACEMENT OF MONOLITHIC INTER-TIER VIAS (MIVs) WITHIN MONOLITHIC TH...
- Publication number 20150145143
- Publication date May 28, 2015
- QUALCOMM Incorporated
- Kambiz Samadi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CLOCK DISTRIBUTION NETWORK FOR 3D INTEGRATED CIRCUIT
- Publication number 20140145347
- Publication date May 29, 2014
- QUALCOMM Incorporated
- Kambiz Samadi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
3D FLOORPLANNING USING 2D AND 3D BLOCKS
- Publication number 20140149958
- Publication date May 29, 2014
- QUALCOMM Incorporated
- Kambiz Samadi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HARD MACRO HAVING BLOCKAGE SITES, INTEGRATED CIRCUIT INCLUDING SAME...
- Publication number 20140131885
- Publication date May 15, 2014
- QUALCOMM Incorporated
- Kambiz Samadi
- G06 - COMPUTING CALCULATING COUNTING

Shreepad Amar Panth

Person

Patents Grantslast 30 patents

Hard macro having blockage sites, integrated circuit including same...

Hard macro having blockage sites, integrated circuit including same...

Hard macro having blockage sites, integrated circuit including same...

Placement of monolithic inter-tier vias (MIVs) within monolithic th...

Clock distribution network for 3D integrated circuit

3D floorplanning using 2D and 3D blocks

Patents Applicationslast 30 patents

HARD MACRO HAVING BLOCKAGE SITES, INTEGRATED CIRCUIT INCLUDING SAME...

HARD MACRO HAVING BLOCKAGE SITES, INTEGRATED CIRCUIT INCLUDING SAME...

PLACEMENT OF MONOLITHIC INTER-TIER VIAS (MIVs) WITHIN MONOLITHIC TH...

PLACEMENT OF MONOLITHIC INTER-TIER VIAS (MIVs) WITHIN MONOLITHIC TH...

CLOCK DISTRIBUTION NETWORK FOR 3D INTEGRATED CIRCUIT

3D FLOORPLANNING USING 2D AND 3D BLOCKS

HARD MACRO HAVING BLOCKAGE SITES, INTEGRATED CIRCUIT INCLUDING SAME...