Solomon I. Beilin

Person

San Carlos, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Method for joining large substrates
- Patent number 6,866,741
- Issue date Mar 15, 2005
- Fujitsu Limited
- Albert W. Chan
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Multi-layer opto-electronic substrates with electrical and optical...
- Patent number 6,845,184
- Issue date Jan 18, 2005
- Fujitsu Limited
- Tetsuzo Yoshimura
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Single and multilayer waveguides and fabrication process
- Patent number 6,785,447
- Issue date Aug 31, 2004
- Fujitsu Limited
- Tetsuzo Yoshimura
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Methods of planarizing structures on wafers and substrates by polis...
- Patent number 6,733,685
- Issue date May 11, 2004
- Fujitsu Limited
- Solomon I. Beilin
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Optical reflective structures and method for making
- Patent number 6,706,546
- Issue date Mar 16, 2004
- Fujitsu Limited
- Tetsuzo Yoshimura
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Three-dimensional opto-electronic modules with electrical and optic...
- Patent number 6,690,845
- Issue date Feb 10, 2004
- Fujitsu Limited
- Tetsuzo Yoshimura
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Optical coupling structures and the fabrication processes
- Patent number 6,684,007
- Issue date Jan 27, 2004
- Fujitsu Limited
- Tetsuzo Yoshimura
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Method of fabricating a substrate with a via connection
- Patent number 6,662,443
- Issue date Dec 16, 2003
- Fujitsu Limited
- William T. Chou
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Opto-electronic substrates with electrical and optical interconnect...
- Patent number 6,611,635
- Issue date Aug 26, 2003
- Fujitsu Limited
- Tetsuzo Yoshimura
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Conductive composition
- Patent number 6,579,474
- Issue date Jun 17, 2003
- Fujitsu Limited
- Mark Thomas McCormack
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Methods for fabricating flexible circuit structures
- Patent number 6,572,780
- Issue date Jun 3, 2003
- Fujitsu Limited
- Mark Thomas McCormack
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Methods for detaching a layer from a substrate
- Patent number 6,544,430
- Issue date Apr 8, 2003
- Fujitsu Limited
- Mark Thomas McCormack
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Isolated flip chip of BGA to minimize interconnect stress due to th...
- Patent number 6,509,529
- Issue date Jan 21, 2003
- Kulicke & Soffa Holdings, Inc.
- Sundar Kamath
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Reduced stress and zero stress interposers for integrated-circuit c...
- Patent number 6,444,921
- Issue date Sep 3, 2002
- Fujitsu Limited
- Wen-chou Vincent Wang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods for fabricating flexible circuit structures
- Patent number 6,391,220
- Issue date May 21, 2002
- Fujitsu Limited, Inc.
- Lei Zhang
- B32 - LAYERED PRODUCTS
Information Patent Grant
Systems based on opto-electronic substrates with electrical and opt...
- Patent number 6,343,171
- Issue date Jan 29, 2002
- Fujitsu Limited
- Tetsuzo Yoshimura
- G02 - OPTICS
Information Patent Grant
Method and structure of z-connected laminated substrate for high de...
- Patent number 6,326,555
- Issue date Dec 4, 2001
- Fujitsu Limited
- Mark Thomas McCormack
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Wiring substrate with thermal insert
- Patent number 6,317,331
- Issue date Nov 13, 2001
- Kulicke & Soffa Holdings, Inc.
- Sundar Kamath
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Isolated flip chip or BGA to minimize interconnect stress due to th...
- Patent number 6,299,053
- Issue date Oct 9, 2001
- Kulicke & Soffa Holdings, Inc.
- Sundar Kamath
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods for making circuit substrates and electrical assemblies
- Patent number 6,281,040
- Issue date Aug 28, 2001
- Fujitsu Limited
- Mark Thomas McCormack
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Reduced cross-talk noise high density signal interposer with power...
- Patent number 6,239,485
- Issue date May 29, 2001
- Fujitsu Limited
- Michael G. Peters
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Power conducting substrates with high-yield integrated substrate ca...
- Patent number 6,226,171
- Issue date May 1, 2001
- Fujitsu Limited
- Solomon I. Beilin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of patterning polyamic acid layers
- Patent number 6,221,567
- Issue date Apr 24, 2001
- Fujitsu Limited
- Solomon I. Beilin
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Grant
Method of fabrication of multiple-layer high density substrate
- Patent number 6,187,652
- Issue date Feb 13, 2001
- Fujitsu Limited
- William T. Chou
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Apparatus for uniform chemical mechanical polishing by intermittent...
- Patent number 6,146,241
- Issue date Nov 14, 2000
- Fujitsu Limited
- Michael G. Lee
- G05 - CONTROLLING REGULATING
Information Patent Grant
Venting hole designs for multilayer conductor-dielectric structures
- Patent number 6,106,923
- Issue date Aug 22, 2000
- Fujitsu Limited
- Yasuhito Takahashi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Controlled impedance interposer substrate and method of making
- Patent number 6,102,710
- Issue date Aug 15, 2000
- Fujitsu Limited
- Solomon I. Beilin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Cleaning method using ammonium persulphate to remove slurry particl...
- Patent number 6,090,214
- Issue date Jul 18, 2000
- Fujitsu Limited
- Dashun Steve Zhou
- B08 - CLEANING
Information Patent Grant
High density signal interposer with power and ground wrap
- Patent number 6,081,026
- Issue date Jun 27, 2000
- Fujitsu Limited
- Wen-chou Vincent Wang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Multi-layer circuit substrates and electrical assemblies having con...
- Patent number 6,054,761
- Issue date Apr 25, 2000
- Fujitsu Limited
- Mark Thomas McCormack
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
Methods for fabricating flexible circuit structures
- Publication number 20020117256
- Publication date Aug 29, 2002
- Mark Thomas McCormack
- B32 - LAYERED PRODUCTS
Information Patent Application
Methods for detaching a layer from a substrate
- Publication number 20020106522
- Publication date Aug 8, 2002
- Mark Thomas McCormack
- B32 - LAYERED PRODUCTS
Information Patent Application
Single and multilayer waveguides and fabrication process
- Publication number 20020097962
- Publication date Jul 25, 2002
- Tetsuzo Yoshimura
- G02 - OPTICS
Information Patent Application
Method for joining large substrates
- Publication number 20020088540
- Publication date Jul 11, 2002
- Albert W. Chan
- B32 - LAYERED PRODUCTS
Information Patent Application
Optical reflective structures and method for making
- Publication number 20020039464
- Publication date Apr 4, 2002
- Tetsuzo Yoshimura
- G02 - OPTICS
Information Patent Application
Optical coupling structures and the fabrication processes
- Publication number 20020028045
- Publication date Mar 7, 2002
- Tetsuzo Yoshimura
- G02 - OPTICS
Information Patent Application
Isolated flip chip or BGA to minimize interconnect stress due to th...
- Publication number 20020011353
- Publication date Jan 31, 2002
- Sundar Kamath
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method of fabricating a substrate with a via connection
- Publication number 20020000037
- Publication date Jan 3, 2002
- William T. Chou
- Y10 - TECHNICAL SUBJECTS COVERED BY FORMER USPC
Information Patent Application
Methods of planarizing structures on wafers and substrates by polis...
- Publication number 20010042734
- Publication date Nov 22, 2001
- Solomon I. Beilin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Conductive composition
- Publication number 20010030062
- Publication date Oct 18, 2001
- Mark Thomas McCormack
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD OF FORMING MULTILAYER CIRCUIT STRUCTURE
- Publication number 20010018796
- Publication date Sep 6, 2001
- MICHAEL G. LEE
- B32 - LAYERED PRODUCTS

Solomon I. Beilin

Person

Patents Grantslast 30 patents

Method for joining large substrates

Multi-layer opto-electronic substrates with electrical and optical...

Single and multilayer waveguides and fabrication process

Methods of planarizing structures on wafers and substrates by polis...

Optical reflective structures and method for making

Three-dimensional opto-electronic modules with electrical and optic...

Optical coupling structures and the fabrication processes

Method of fabricating a substrate with a via connection

Opto-electronic substrates with electrical and optical interconnect...

Conductive composition

Methods for fabricating flexible circuit structures

Methods for detaching a layer from a substrate

Isolated flip chip of BGA to minimize interconnect stress due to th...

Reduced stress and zero stress interposers for integrated-circuit c...

Methods for fabricating flexible circuit structures

Systems based on opto-electronic substrates with electrical and opt...

Method and structure of z-connected laminated substrate for high de...

Wiring substrate with thermal insert

Isolated flip chip or BGA to minimize interconnect stress due to th...

Methods for making circuit substrates and electrical assemblies

Reduced cross-talk noise high density signal interposer with power...

Power conducting substrates with high-yield integrated substrate ca...

Method of patterning polyamic acid layers

Method of fabrication of multiple-layer high density substrate

Apparatus for uniform chemical mechanical polishing by intermittent...

Venting hole designs for multilayer conductor-dielectric structures

Controlled impedance interposer substrate and method of making

Cleaning method using ammonium persulphate to remove slurry particl...

High density signal interposer with power and ground wrap

Multi-layer circuit substrates and electrical assemblies having con...

Patents Applicationslast 30 patents

Methods for fabricating flexible circuit structures

Methods for detaching a layer from a substrate

Single and multilayer waveguides and fabrication process

Method for joining large substrates

Optical reflective structures and method for making

Optical coupling structures and the fabrication processes

Isolated flip chip or BGA to minimize interconnect stress due to th...

Method of fabricating a substrate with a via connection

Methods of planarizing structures on wafers and substrates by polis...

Conductive composition

METHOD OF FORMING MULTILAYER CIRCUIT STRUCTURE