Srinivas V. Pietambaram

Person

Gilbert, AZ, US

People

Patents Grantslast 30 patents

Information Patent Grant
Heterogeneous nested interposer package for IC chips
- Patent number 12,272,656
- Issue date Apr 8, 2025
- Intel Corporation
- Debendra Mallik
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Coreless electronic substrates having embedded inductors
- Patent number 12,272,484
- Issue date Apr 8, 2025
- Intel Corporation
- Srinivas Pietambaram
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Electronic substrate having an embedded etch stop to control cavity...
- Patent number 12,255,147
- Issue date Mar 18, 2025
- Intel Corporation
- Jeremy Ecton
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Microelectronic assemblies having integrated magnetic core inductors
- Patent number 12,249,584
- Issue date Mar 11, 2025
- Intel Corporation
- Kristof Kuwawi Darmawikarta
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Hybrid conductive vias for electronic substrates
- Patent number 12,243,825
- Issue date Mar 4, 2025
- Intel Corporation
- Srinivas Pietambaram
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Substrate embedded magnetic core inductors and method of making
- Patent number 12,230,430
- Issue date Feb 18, 2025
- Intel Corporation
- Srinivas Pietambaram
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Angled inductor with small form factor
- Patent number 12,224,103
- Issue date Feb 11, 2025
- Intel Corporation
- Brandon Marin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Panel level packaging for multi-die products interconnected with ve...
- Patent number 12,218,071
- Issue date Feb 4, 2025
- Intel Corporation
- Srinivas V. Pietambaram
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Nested interposer with through-silicon via bridge die
- Patent number 12,218,040
- Issue date Feb 4, 2025
- Intel Corporation
- Srinivas V. Pietambaram
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Heterogeneous nested interposer package for IC chips
- Patent number 12,199,048
- Issue date Jan 14, 2025
- Intel Corporation
- Debendra Mallik
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Hybrid glass core for wafer level and panel level packaging applica...
- Patent number 12,191,240
- Issue date Jan 7, 2025
- Intel Corporation
- Jieying Kong
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit package supports
- Patent number 12,176,223
- Issue date Dec 24, 2024
- Intel Corporation
- Kristof Kuwawi Darmawikarta
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Radio frequency antennas and waveguides for communication between i...
- Patent number 12,165,994
- Issue date Dec 10, 2024
- Intel Corporation
- Aleksandar Aleksov
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Electrical interconnect bridge
- Patent number 12,148,704
- Issue date Nov 19, 2024
- Intel Corporation
- Srinivas V. Pietambaram
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Hybrid fan-out architecture with EMIB and glass core for heterogene...
- Patent number 12,125,793
- Issue date Oct 22, 2024
- Intel Corporation
- Srinivas Pietambaram
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Embedded die microelectronic device with molded component
- Patent number 12,087,700
- Issue date Sep 10, 2024
- Intel Corporation
- Srinivas Venkata Ramanuja Pietambaram
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Hybrid fan-out architecture with EMIB and glass core for heterogene...
- Patent number 12,087,695
- Issue date Sep 10, 2024
- Intel Corporation
- Srinivas Pietambaram
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Chiplet first architecture for die tiling applications
- Patent number 11,990,427
- Issue date May 21, 2024
- Intel Corporation
- Srinivas Pietambaram
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Glass core patch with in situ fabricated fan-out layer to enable di...
- Patent number 11,978,685
- Issue date May 7, 2024
- Intel Corporation
- Srinivas Pietambaram
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Chiplet first architecture for die tiling applications
- Patent number 11,973,041
- Issue date Apr 30, 2024
- Intel Corporation
- Srinivas Pietambaram
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Etch barrier for microelectronic packaging conductive structures
- Patent number 11,948,898
- Issue date Apr 2, 2024
- Intel Corporation
- Kristof Darmawikarta
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Surface finishes with low RBTV for fine and mixed bump pitch archit...
- Patent number 11,935,857
- Issue date Mar 19, 2024
- Intel Corporation
- Kristof Darmawaikarta
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method to form high capacitance thin film capacitors (TFCs) as embe...
- Patent number 11,929,212
- Issue date Mar 12, 2024
- Intel Corporation
- Sameer Paital
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Patternable die attach materials and processes for patterning
- Patent number 11,923,312
- Issue date Mar 5, 2024
- Intel Corporation
- Bai Nie
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Embedded die architecture and method of making
- Patent number 11,901,248
- Issue date Feb 13, 2024
- Intel Corporation
- Robert L. Sankman
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Patch accommodating embedded dies having different thicknesses
- Patent number 11,862,619
- Issue date Jan 2, 2024
- Intel Corporation
- Srinivas Pietambaram
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Capacitors with nanoislands on conductive plates
- Patent number 11,855,125
- Issue date Dec 26, 2023
- Intel Corporation
- Srinivas Pietambaram
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit package supports
- Patent number 11,854,834
- Issue date Dec 26, 2023
- Intel Corporation
- Kristof Kuwawi Darmawikarta
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Heterogeneous nested interposer package for IC chips
- Patent number 11,824,018
- Issue date Nov 21, 2023
- Debendra Mallik
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Conductive route patterning for electronic substrates
- Patent number 11,817,349
- Issue date Nov 14, 2023
- Intel Corporation
- Jeremy Ecton
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
PACKAGE SUBSTRATES WITH COMPONENTS INCLUDED IN CAVITIES OF GLASS CORES
- Publication number 20250120102
- Publication date Apr 10, 2025
- Intel Corporation
- Brandon Christian Marin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
NESTED INTERPOSER WITH THROUGH-SILICON VIA BRIDGE DIE
- Publication number 20250118647
- Publication date Apr 10, 2025
- Intel Corporation
- Srinivas V. PIETAMBARAM
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
THROUGH-GLASS VIA LINERS FOR INTEGRATED CIRCUIT DEVICE PACKAGES
- Publication number 20250112163
- Publication date Apr 3, 2025
- Intel Corporation
- Pratyush Mishra
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DIE EMBEDDED IN GLASS LAYER WITH TWO-SIDE CONNECTIVITY
- Publication number 20250112100
- Publication date Apr 3, 2025
- Intel Corporation
- Robert May
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DEEP CAVITY ARRANGEMENTS ON INTEGRATED CIRCUIT PACKAGING
- Publication number 20250112124
- Publication date Apr 3, 2025
- Intel Corporation
- Jeremy Ecton
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MICROELECTRONIC STRUCTURES INCLUDING GLASS SUBSTRATES WITH DIELECTR...
- Publication number 20250112138
- Publication date Apr 3, 2025
- Intel Corporation
- Srinivas Pietambaram
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHODS AND APPARATUS TO CONNECT INTERCONNECT BRIDGES TO PACKAGE SU...
- Publication number 20250112161
- Publication date Apr 3, 2025
- Intel Corporation
- Minglu Liu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MICROELECTRONIC ASSEMBLIES WITH EDGE STRESS REDUCTION IN GLASS CORES
- Publication number 20250112175
- Publication date Apr 3, 2025
- Intel Corporation
- Brandon C. Marin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
TECHNOLOGIES FOR A COAXIAL INDUCTOR IN A GLASS CORE
- Publication number 20250112179
- Publication date Apr 3, 2025
- Intel Corporation
- Brandon Christian Marin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
GLASS CORE PROTECTION USING PERIPHERAL BUFFER LAYERS
- Publication number 20250112136
- Publication date Apr 3, 2025
- Intel Corporation
- Bohan SHAN
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DEEP CAVITY METALLIZATION AND FIDUCIAL ARRANGEMENTS FOR EMBEDDED DI...
- Publication number 20250112162
- Publication date Apr 3, 2025
- Intel Corporation
- Zheng Kang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
APPARATUS AND METHODS FOR CAPILLARY UNDERFILL OF EMBEDDED DEVICES
- Publication number 20250112085
- Publication date Apr 3, 2025
- Intel Corporation
- Bohan Shan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CONTROLLING SUBSTRATE BUMP HEIGHT
- Publication number 20250112164
- Publication date Apr 3, 2025
- Intel Corporation
- Bohan SHAN
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
ANISOTROPIC CONDUCTIVE CONNECTIONS FOR INTERCONNECT BRIDGES AND REL...
- Publication number 20250112165
- Publication date Apr 3, 2025
- Intel Corporation
- Brandon Marin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
THROUGH GLASS VIA (TGV) WITH MODULATED PROFILE FOR CORE STRESS REDU...
- Publication number 20250113434
- Publication date Apr 3, 2025
- Intel Corporation
- Bai NIE
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
STRESS MITIGATION ARCHITECTURES FOR GLASS CORE SUBSTRATES
- Publication number 20250112140
- Publication date Apr 3, 2025
- Intel Corporation
- Rahul BHURE
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INDUCTORS FOR SEMICONDUCTOR PACKAGE SUBSTRATES
- Publication number 20250107112
- Publication date Mar 27, 2025
- Intel Corporation
- Brandon C. MARIN
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
NANOTWIN LINER FOR THROUGH GLASS VIAS
- Publication number 20250106982
- Publication date Mar 27, 2025
- Intel Corporation
- Sashi S. KANDANUR
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
POROUS COPPER LINER FOR THROUGH GLASS VIA (TGV) GLASS CORES
- Publication number 20250105132
- Publication date Mar 27, 2025
- Intel Corporation
- Pratyush MISHRA
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT PACKAGES INCLUDING A SUBSTRATE COUPLED TO A GLAS...
- Publication number 20250105156
- Publication date Mar 27, 2025
- Intel Corporation
- Jeremy Ecton
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
GLASS CORES INCLUDING PROTRUDING THROUGH GLASS VIAS AND RELATED MET...
- Publication number 20250105074
- Publication date Mar 27, 2025
- Intel Corporation
- Bohan Shan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
HIGH PERFORMANCE MICROELECTRONIC ASSEMBLIES INCLUDING THROUGH-SILIC...
- Publication number 20250105209
- Publication date Mar 27, 2025
- Intel Corporation
- Gang Duan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
HIGH PERFORMANCE MICROELECTRONIC ASSEMBLIES INCLUDING THROUGH-SILIC...
- Publication number 20250105222
- Publication date Mar 27, 2025
- Intel Corporation
- Gang Duan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SELF-HEALING LINER FOR THROUGH GLASS VIA RELIABILITY
- Publication number 20250105119
- Publication date Mar 27, 2025
- Intel Corporation
- Yuqin LI
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
STIFFENER ARCHITECTURES FOR GLASS EDGE PROTECTION
- Publication number 20250106983
- Publication date Mar 27, 2025
- Intel Corporation
- Bohan SHAN
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
ELECTROLESS SEED LAYER DEPOSITION ON GLASS CORE SUBSTRATES
- Publication number 20250106997
- Publication date Mar 27, 2025
- Intel Corporation
- Ehsan ZAMANI
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MICROELECTRONIC ASSEMBLIES HAVING A BRIDGE DIE OVER A GLASS PATCH
- Publication number 20250096053
- Publication date Mar 20, 2025
- Intel Corporation
- Jeremy Ecton
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MICROELECTRONIC ASSEMBLY WITH BRIDGE DIE AND SELECTIVE METALLIZATIO...
- Publication number 20250096143
- Publication date Mar 20, 2025
- Intel Corporation
- Jeremy Ecton
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
LOCALIZED THERMAL HEALING AND DOPING OF GLASS CORES FOR MICROELECTR...
- Publication number 20250096052
- Publication date Mar 20, 2025
- Intel Corporation
- Mohamed R. Saber
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
LOW STRESS THROUGH GLASS VIAS (TGVS)
- Publication number 20250089156
- Publication date Mar 13, 2025
- Intel Corporation
- Mohamed R. SABER
- H01 - BASIC ELECTRIC ELEMENTS

Srinivas V. Pietambaram

Person

Patents Grantslast 30 patents

Heterogeneous nested interposer package for IC chips

Coreless electronic substrates having embedded inductors

Electronic substrate having an embedded etch stop to control cavity...

Microelectronic assemblies having integrated magnetic core inductors

Hybrid conductive vias for electronic substrates

Substrate embedded magnetic core inductors and method of making

Angled inductor with small form factor

Panel level packaging for multi-die products interconnected with ve...

Nested interposer with through-silicon via bridge die

Heterogeneous nested interposer package for IC chips

Hybrid glass core for wafer level and panel level packaging applica...

Integrated circuit package supports

Radio frequency antennas and waveguides for communication between i...

Electrical interconnect bridge

Hybrid fan-out architecture with EMIB and glass core for heterogene...

Embedded die microelectronic device with molded component

Hybrid fan-out architecture with EMIB and glass core for heterogene...

Chiplet first architecture for die tiling applications

Glass core patch with in situ fabricated fan-out layer to enable di...

Chiplet first architecture for die tiling applications

Etch barrier for microelectronic packaging conductive structures

Surface finishes with low RBTV for fine and mixed bump pitch archit...

Method to form high capacitance thin film capacitors (TFCs) as embe...

Patternable die attach materials and processes for patterning

Embedded die architecture and method of making

Patch accommodating embedded dies having different thicknesses

Capacitors with nanoislands on conductive plates

Integrated circuit package supports

Heterogeneous nested interposer package for IC chips

Conductive route patterning for electronic substrates

Patents Applicationslast 30 patents

PACKAGE SUBSTRATES WITH COMPONENTS INCLUDED IN CAVITIES OF GLASS CORES

NESTED INTERPOSER WITH THROUGH-SILICON VIA BRIDGE DIE

THROUGH-GLASS VIA LINERS FOR INTEGRATED CIRCUIT DEVICE PACKAGES

DIE EMBEDDED IN GLASS LAYER WITH TWO-SIDE CONNECTIVITY

DEEP CAVITY ARRANGEMENTS ON INTEGRATED CIRCUIT PACKAGING

MICROELECTRONIC STRUCTURES INCLUDING GLASS SUBSTRATES WITH DIELECTR...

METHODS AND APPARATUS TO CONNECT INTERCONNECT BRIDGES TO PACKAGE SU...

MICROELECTRONIC ASSEMBLIES WITH EDGE STRESS REDUCTION IN GLASS CORES

TECHNOLOGIES FOR A COAXIAL INDUCTOR IN A GLASS CORE

GLASS CORE PROTECTION USING PERIPHERAL BUFFER LAYERS

DEEP CAVITY METALLIZATION AND FIDUCIAL ARRANGEMENTS FOR EMBEDDED DI...

APPARATUS AND METHODS FOR CAPILLARY UNDERFILL OF EMBEDDED DEVICES

CONTROLLING SUBSTRATE BUMP HEIGHT

ANISOTROPIC CONDUCTIVE CONNECTIONS FOR INTERCONNECT BRIDGES AND REL...

THROUGH GLASS VIA (TGV) WITH MODULATED PROFILE FOR CORE STRESS REDU...

STRESS MITIGATION ARCHITECTURES FOR GLASS CORE SUBSTRATES

INDUCTORS FOR SEMICONDUCTOR PACKAGE SUBSTRATES

NANOTWIN LINER FOR THROUGH GLASS VIAS

POROUS COPPER LINER FOR THROUGH GLASS VIA (TGV) GLASS CORES

INTEGRATED CIRCUIT PACKAGES INCLUDING A SUBSTRATE COUPLED TO A GLAS...

GLASS CORES INCLUDING PROTRUDING THROUGH GLASS VIAS AND RELATED MET...

HIGH PERFORMANCE MICROELECTRONIC ASSEMBLIES INCLUDING THROUGH-SILIC...

HIGH PERFORMANCE MICROELECTRONIC ASSEMBLIES INCLUDING THROUGH-SILIC...

SELF-HEALING LINER FOR THROUGH GLASS VIA RELIABILITY

STIFFENER ARCHITECTURES FOR GLASS EDGE PROTECTION

ELECTROLESS SEED LAYER DEPOSITION ON GLASS CORE SUBSTRATES

MICROELECTRONIC ASSEMBLIES HAVING A BRIDGE DIE OVER A GLASS PATCH

MICROELECTRONIC ASSEMBLY WITH BRIDGE DIE AND SELECTIVE METALLIZATIO...

LOCALIZED THERMAL HEALING AND DOPING OF GLASS CORES FOR MICROELECTR...

LOW STRESS THROUGH GLASS VIAS (TGVS)