Stephan RIEDEL

Person

Dresden, DE

People

Patents Grantslast 30 patents

Information Patent Grant
Protecting transistor elements against degrading species
- Patent number 10,325,985
- Issue date Jun 18, 2019
- FLEXENABLE LIMITED
- Jan Jongman
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Transistor array routing
- Patent number 9,876,034
- Issue date Jan 23, 2018
- FLEXENABLE LIMITED
- Stephan Riedel
- G02 - OPTICS
Information Patent Grant
Reducing parasitic leakages in transistor arrays
- Patent number 9,837,450
- Issue date Dec 5, 2017
- FLEXENABLE LIMITED
- Stephan Riedel
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Suppressing leakage currents in a multi-TFT device
- Patent number 9,748,278
- Issue date Aug 29, 2017
- FLEXENABLE LIMITED
- Stephan Riedel
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Forming a conductive connection between a common electrode of an op...
- Patent number 9,627,493
- Issue date Apr 18, 2017
- FLEXENABLE LIMITED
- Stephan Riedel
- G02 - OPTICS
Information Patent Grant
Determining layer thickness
- Patent number 9,035,665
- Issue date May 19, 2015
- Plastic Logic Limited
- Stephan Riedel
- G01 - MEASURING TESTING
Information Patent Grant
Method and circuit for erasing a non-volatile memory cell
- Patent number 8,116,142
- Issue date Feb 14, 2012
- Infineon Technologies AG
- Stephan Riedel
- G11 - INFORMATION STORAGE
Information Patent Grant
Integrated circuits having a contact region and methods for manufac...
- Patent number 7,915,667
- Issue date Mar 29, 2011
- Qimonda AG
- Roman Knoefler
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor memory device and method of production
- Patent number 7,642,158
- Issue date Jan 5, 2010
- Infineon Technologies AG
- Stefano Parascandola
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for producing charge-trapping memory cell arrays
- Patent number 7,427,548
- Issue date Sep 23, 2008
- Infineon Technologies AG
- Stephan Riedel
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor memory with virtual ground architecture
- Patent number 7,288,812
- Issue date Oct 30, 2007
- Infineon Technologies AG
- Stephan Riedel
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor device and method of producing a semiconductor device
- Patent number 7,238,974
- Issue date Jul 3, 2007
- Infineon Technologies AG
- Matthias Strassburg
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Non-volatile semiconductor memory
- Patent number 7,151,697
- Issue date Dec 19, 2006
- Infineon Technologies AG
- Stephan Riedel
- G11 - INFORMATION STORAGE
Information Patent Grant
Method for production of charge-trapping memory devices
- Patent number 7,026,220
- Issue date Apr 11, 2006
- Infineon Technologies AG
- Georg Tempel
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
PROTECTING TRANSISTOR ELEMENTS AGAINST DEGRADING SPECIES
- Publication number 20170179231
- Publication date Jun 22, 2017
- FLEXENABLE LIMITED
- Jan JONGMAN
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
ADDRESSING OF GROUPS OF TRANSISTORS IN A MATRIX ARRANGEMENT
- Publication number 20160275862
- Publication date Sep 22, 2016
- FLEXENABLE LIMITED
- Stephan RIEDEL
- G09 - EDUCATION CRYPTOGRAPHY DISPLAY ADVERTISING SEALS
Information Patent Application
REDUCING PARASITIC LEAKAGES IN TRANSISTOR ARRAYS
- Publication number 20160233254
- Publication date Aug 11, 2016
- FLEXENABLE LIMITED
- Stephan RIEDEL
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
TRANSISTOR ARRAY ROUTING
- Publication number 20160233237
- Publication date Aug 11, 2016
- FLEXENABLE LIMITED
- Stephan RIEDEL
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
FORMING A CONDUCTIVE CONNECTION BETWEEN A COMMON ELECTRODE OF AN OP...
- Publication number 20150206944
- Publication date Jul 23, 2015
- FLEXENABLE LIMITED
- Stephan Riedel
- G02 - OPTICS
Information Patent Application
DETERMINING LAYER THICKNESS
- Publication number 20130141120
- Publication date Jun 6, 2013
- PLASTIC LOGIC LIMITED
- Stephan Riedel
- G01 - MEASURING TESTING
Information Patent Application
Integrated Circuits Having a Contact Region and Methods for Manufac...
- Publication number 20090309152
- Publication date Dec 17, 2009
- Roman Knoefler
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor structure, semiconductor memory device and method of...
- Publication number 20080099828
- Publication date May 1, 2008
- Frank Heinrichsdorff
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method for production of memory devices and semiconductor memory de...
- Publication number 20070221979
- Publication date Sep 27, 2007
- Dirk Caspary
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor memory device and method of production
- Publication number 20070075381
- Publication date Apr 5, 2007
- Stefano Parascandola
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method and circuit for erasing a non-volatile memory cell
- Publication number 20070058444
- Publication date Mar 15, 2007
- Saifun Semiconductors, Ltd.
- Stephan Riedel
- G11 - INFORMATION STORAGE
Information Patent Application
Charge-trapping memory device and method of production
- Publication number 20070045717
- Publication date Mar 1, 2007
- Stefano Parascandola
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Fabrication method for semiconductor memory components
- Publication number 20070042553
- Publication date Feb 22, 2007
- Karl-Heinz Kuesters
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method for producing charge-trapping memory cell arrays
- Publication number 20070004153
- Publication date Jan 4, 2007
- Stephan Riedel
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Non-volatile semiconductor memory
- Publication number 20060114724
- Publication date Jun 1, 2006
- Stephan Riedel
- G11 - INFORMATION STORAGE
Information Patent Application
Semiconductor device and method of producing a semiconductor device
- Publication number 20060091424
- Publication date May 4, 2006
- Matthias Strassburg
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method for fabricating a drain/source path
- Publication number 20060054979
- Publication date Mar 16, 2006
- Philipp Kratzert
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor memory with virtual ground architecture
- Publication number 20050006710
- Publication date Jan 13, 2005
- Stephan Riedel
- G11 - INFORMATION STORAGE
Information Patent Application
Semiconductor configuration with UV protection
- Publication number 20040192022
- Publication date Sep 30, 2004
- Mirko Vogt
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
NROM memory cell
- Publication number 20040070025
- Publication date Apr 15, 2004
- Boaz Eitan
- H01 - BASIC ELECTRIC ELEMENTS

Stephan RIEDEL

Person

Patents Grantslast 30 patents

Protecting transistor elements against degrading species

Transistor array routing

Reducing parasitic leakages in transistor arrays

Suppressing leakage currents in a multi-TFT device

Forming a conductive connection between a common electrode of an op...

Determining layer thickness

Method and circuit for erasing a non-volatile memory cell

Integrated circuits having a contact region and methods for manufac...

Semiconductor memory device and method of production

Method for producing charge-trapping memory cell arrays

Semiconductor memory with virtual ground architecture

Semiconductor device and method of producing a semiconductor device

Non-volatile semiconductor memory

Method for production of charge-trapping memory devices

Patents Applicationslast 30 patents

PROTECTING TRANSISTOR ELEMENTS AGAINST DEGRADING SPECIES

ADDRESSING OF GROUPS OF TRANSISTORS IN A MATRIX ARRANGEMENT

REDUCING PARASITIC LEAKAGES IN TRANSISTOR ARRAYS

TRANSISTOR ARRAY ROUTING

FORMING A CONDUCTIVE CONNECTION BETWEEN A COMMON ELECTRODE OF AN OP...

DETERMINING LAYER THICKNESS

Integrated Circuits Having a Contact Region and Methods for Manufac...

Semiconductor structure, semiconductor memory device and method of...

Method for production of memory devices and semiconductor memory de...

Semiconductor memory device and method of production

Method and circuit for erasing a non-volatile memory cell

Charge-trapping memory device and method of production

Fabrication method for semiconductor memory components

Method for producing charge-trapping memory cell arrays

Non-volatile semiconductor memory

Semiconductor device and method of producing a semiconductor device

Method for fabricating a drain/source path

Semiconductor memory with virtual ground architecture

Semiconductor configuration with UV protection

NROM memory cell