Thomas E. Harrington III

Person

Carrollton, TX, US

People

Patents Grantslast 30 patents

Information Patent Grant
Power semiconductor device with reduced strain
- Patent number 12,159,909
- Issue date Dec 3, 2024
- Wolfspeed, Inc.
- Daniel Jenner Lichtenwalner
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Wide bandgap semiconductor device with sensor element
- Patent number 12,074,079
- Issue date Aug 27, 2024
- Wolfspeed, Inc.
- Joohyung Kim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Power semiconductor device with reduced strain
- Patent number 11,869,948
- Issue date Jan 9, 2024
- Wolfspeed, Inc.
- Daniel Jenner Lichtenwalner
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Gate trench power semiconductor devices having improved deep shield...
- Patent number 11,769,828
- Issue date Sep 26, 2023
- Wolfspeed, Inc.
- Thomas E. Harrington
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor devices having gate resistors with low variation in r...
- Patent number 11,664,436
- Issue date May 30, 2023
- Wolfspeed, Inc.
- Sei-Hyung Ryu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Edge termination structures for semiconductor devices
- Patent number 11,600,724
- Issue date Mar 7, 2023
- Wolfspeed, Inc.
- Edward Robert Van Brunt
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Super junction MOS bipolar transistor having drain gaps
- Patent number 10,580,884
- Issue date Mar 3, 2020
- D3 Semiconductor LLC
- Thomas E. Harrington
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Termination region architecture for vertical power transistors
- Patent number 10,134,890
- Issue date Nov 20, 2018
- D3 Semiconductor LLC
- Thomas E. Harrington
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Surface devices within a vertical power device
- Patent number 10,074,735
- Issue date Sep 11, 2018
- D3 Semiconductor LLC
- Thomas E. Harrington
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Device architecture and method for precision enhancement of vertica...
- Patent number 9,997,455
- Issue date Jun 12, 2018
- D3 Semiconductor LLC
- Thomas E. Harrington
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Device architecture and method for improved packing of vertical fie...
- Patent number 9,865,727
- Issue date Jan 9, 2018
- D3 Semiconductor LLC
- Thomas E. Harrington
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Source-gate region architecture in a vertical power semiconductor d...
- Patent number 9,837,358
- Issue date Dec 5, 2017
- D3 Semiconductor LLC
- Thomas E. Harrington
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Termination region architecture for vertical power transistors
- Patent number 9,806,186
- Issue date Oct 31, 2017
- D3 Semiconductor LLC
- Thomas E. Harrington
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Surface devices within a vertical power device
- Patent number 9,755,058
- Issue date Sep 5, 2017
- D3 Semiconductor LLC
- Thomas E. Harrington
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Device architecture and method for precision enhancement of vertica...
- Patent number 9,589,889
- Issue date Mar 7, 2017
- D3 Semiconductor LLC
- Thomas E. Harrington
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Device architecture and method for improved packing of vertical fie...
- Patent number 9,496,386
- Issue date Nov 15, 2016
- D3 Semiconductor LLC
- Thomas E. Harrington
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Device architecture and method for improved packing of vertical fie...
- Patent number 9,117,899
- Issue date Aug 25, 2015
- D3 Semiconductor LLC
- Thomas E. Harrington
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Device architecture and method for precision enhancement of vertica...
- Patent number 9,117,709
- Issue date Aug 25, 2015
- D3 Semiconductor LLC
- Thomas E. Harrington
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
On-chip electrostatic discharge protection for a semiconductor device
- Patent number 8,987,778
- Issue date Mar 24, 2015
- Maxim Integrated Products, Inc.
- Yue Zu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of making polysilicon resistor having adjustable temperature...
- Patent number 6,306,718
- Issue date Oct 23, 2001
- Dallas Semiconductor Corporation
- Varun Singh
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
CMOS integrated circuit with reduced susceptibility to PMOS punchth...
- Patent number 5,688,722
- Issue date Nov 18, 1997
- Dallas Semiconductor Corporation
- Thomas E. Harrington
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
CMOS integrated circuit with reduced susceptibility to PMOS punchth...
- Patent number 5,682,051
- Issue date Oct 28, 1997
- Dallas Semiconductor Corporation
- Thomas E. Harrington
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit with improved protection against negative transi...
- Patent number 5,181,091
- Issue date Jan 19, 1993
- Dallas Semiconductor Corp.
- Thomas E. Harrington
- H02 - GENERATION CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
Information Patent Grant
Integrated circuit with improved battery protection
- Patent number 5,159,426
- Issue date Oct 27, 1992
- Dallas Semiconductor Corporation
- Thomas E. Harrington
- H02 - GENERATION CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
Information Patent Grant
Method of fabricating a CMOS IC with reduced susceptibility to PMOS...
- Patent number 5,122,474
- Issue date Jun 16, 1992
- Dallas Semiconductor Corporation
- Thomas E. Harrington
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit with improved battery protection
- Patent number 4,980,746
- Issue date Dec 25, 1990
- Dallas Semiconductor Corporation
- Thomas E. Harrington
- H02 - GENERATION CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
Information Patent Grant
Process for making integrated circuit with doped silicon dioxide lo...
- Patent number 4,950,620
- Issue date Aug 21, 1990
- Dallas Semiconductor Corp.
- Thomas E. Harrington
- G11 - INFORMATION STORAGE
Information Patent Grant
CMOS integrated circuit with reduced susceptibility to PMOS punchth...
- Patent number 4,943,537
- Issue date Jul 24, 1990
- Dallas Semiconductor Corporation
- Thomas E. Harrington
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Enclosed buried channel transistor
- Patent number 4,906,588
- Issue date Mar 6, 1990
- Dallas Semiconductor Corporation
- Thomas E. Harrington
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Low leakage battery protection diode structure
- Patent number 4,862,310
- Issue date Aug 29, 1989
- Dallas Semiconductor Corporation
- Thomas E. Harrington
- H02 - GENERATION CONVERSION OR DISTRIBUTION OF ELECTRIC POWER

Patents Applicationslast 30 patents

Information Patent Application
WIDE BANDGAP SEMICONDUCTOR DEVICE WITH SENSOR ELEMENT
- Publication number 20240379667
- Publication date Nov 14, 2024
- Wolfspeed, Inc.
- Joohyung Kim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Power Semiconductor Devices Including Multiple Layer Metallization
- Publication number 20240213196
- Publication date Jun 27, 2024
- Wolfspeed, Inc.
- Thomas Edgar Harrington
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
POWER SEMICONDUCTOR DEVICE WITH REDUCED STRAIN
- Publication number 20240072131
- Publication date Feb 29, 2024
- Wolfspeed, Inc.
- Daniel Jenner Lichtenwalner
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
POWER SEMICONDUCTOR DEVICE WITH SHALLOW CONDUCTION REGION
- Publication number 20230327026
- Publication date Oct 12, 2023
- Wolfspeed, Inc.
- Rahul R. Potera
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR DEVICES HAVING GATE RESISTORS WITH LOW VARIATION IN R...
- Publication number 20230268407
- Publication date Aug 24, 2023
- Wolfspeed, Inc.
- Sei-Hyung Ryu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
WIDE BANDGAP UNIPOLAR/BIPOLAR TRANSISTOR
- Publication number 20230246073
- Publication date Aug 3, 2023
- Wolfspeed, Inc.
- Thomas E. Harrington
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
EDGE TERMINATION STRUCTURES FOR SEMICONDUCTOR DEVICES
- Publication number 20230178650
- Publication date Jun 8, 2023
- Wolfspeed, Inc.
- Edward Robert Van Brunt
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MULTIPLE SILICIDE PROCESS FOR SEPARATELY FORMING N-TYPE AND P-TYPE...
- Publication number 20230124215
- Publication date Apr 20, 2023
- Wolfspeed, Inc.
- Thomas E. Harrington
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
POWER SEMICONDUCTOR DEVICES INCLUDING MULTIPLE GATE BOND PADS
- Publication number 20230120729
- Publication date Apr 20, 2023
- Wolfspeed, Inc.
- Thomas E. Harrington
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR DEVICES HAVING GATE RESISTORS WITH LOW VARIATION IN R...
- Publication number 20220278212
- Publication date Sep 1, 2022
- Cree, Inc.
- Sei-Hyung Ryu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
POWER SEMICONDUCTOR DEVICE WITH REDUCED STRAIN
- Publication number 20220262909
- Publication date Aug 18, 2022
- Cree, Inc.
- Daniel Jenner Lichtenwalner
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PASSIVATION STRUCTURES FOR SEMICONDUCTOR DEVICES
- Publication number 20220140132
- Publication date May 5, 2022
- Cree, Inc.
- Edward Robert Van Brunt
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
GATE TRENCH POWER SEMICONDUCTOR DEVICES HAVING IMPROVED DEEP SHIELD...
- Publication number 20220130997
- Publication date Apr 28, 2022
- Cree, Inc.
- Thomas E. Harrington
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
EDGE TERMINATION STRUCTURES FOR SEMICONDUCTOR DEVICES
- Publication number 20220093791
- Publication date Mar 24, 2022
- Cree, Inc.
- Edward Robert Van Brunt
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
WIDE BANDGAP SEMICONDUCTOR DEVICE WITH SENSOR ELEMENT
- Publication number 20210202341
- Publication date Jul 1, 2021
- Cree, Inc.
- Joohyung Kim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SUPER JUNCTION MOS BIPOLAR TRANSISTOR AND PROCESS OF MANUFACTURE
- Publication number 20200203511
- Publication date Jun 25, 2020
- D3 Semiconductor LLC
- Thomas E. Harrington
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SURFACE DEVICES WITHIN A VERTICAL POWER DEVICE
- Publication number 20200026517
- Publication date Jan 23, 2020
- D3 Semiconductor, LLC
- Thomas E. Harrington
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Termination Region Architecture for Vertical Power Transistors
- Publication number 20180277673
- Publication date Sep 27, 2018
- D3 Semiconductor LLC
- Thomas E. Harrington
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SUPER JUNCTION MOS BIPOLAR TRANSISTOR AND PROCESS OF MANUFACTURE
- Publication number 20180261691
- Publication date Sep 13, 2018
- D3 Semiconductor LLC
- Thomas E. Harrington
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Source-Gate Region Architecture in a Vertical Power Semiconductor D...
- Publication number 20180174968
- Publication date Jun 21, 2018
- D3 Semiconductor LLC
- Thomas E. Harrington
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SURFACE DEVICES WITHIN A VERTICAL POWER DEVICE
- Publication number 20180012981
- Publication date Jan 11, 2018
- D3 Semiconductor LLC
- Thomas E. Harrington
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DEVICE ARCHITECTURE AND METHOD FOR PRECISION ENHANCEMENT OF VERTICA...
- Publication number 20170179024
- Publication date Jun 22, 2017
- D3 Semiconductor LLC
- Thomas E. Harrington
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Termination Region Architecture for Vertical Power Transistors
- Publication number 20170098705
- Publication date Apr 6, 2017
- D3 Semiconductor LLC
- Thomas E. Harrington
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Source-Gate Region Architecture in a Vertical Power Semiconductor D...
- Publication number 20170098609
- Publication date Apr 6, 2017
- D3 Semiconductor LLC
- Thomas E. Harrington
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DEVICE ARCHITECTURE AND METHOD FOR IMPROVED PACKING OF VERTICAL FIE...
- Publication number 20170062606
- Publication date Mar 2, 2017
- D3 Semiconductor LLC
- Thomas E. Harrington
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SURFACE DEVICES WITHIN A VERTICAL POWER DEVICE
- Publication number 20160254373
- Publication date Sep 1, 2016
- D3 Semiconductor LLC
- Thomas E. Harrington
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DEVICE ARCHITECTURE AND METHOD FOR PRECISION ENHANCEMENT OF VERTICA...
- Publication number 20150340318
- Publication date Nov 26, 2015
- D3 Semiconductor LLC
- Thomas E. Harrington
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DEVICE ARCHITECTURE AND METHOD FOR IMPROVED PACKING OF VERTICAL FIE...
- Publication number 20150340454
- Publication date Nov 26, 2015
- D3 Semiconductor LLC
- Thomas E. Harrington
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DEVICE ARCHITECTURE AND METHOD FOR TEMPERATURE COMPENSATION OF VERT...
- Publication number 20140264343
- Publication date Sep 18, 2014
- D3 Semiconductor LLC
- Thomas E. Harrington
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DEVICE ARCHITECTURE AND METHOD FOR IMPROVED PACKING OF VERTICAL FIE...
- Publication number 20140145245
- Publication date May 29, 2014
- D3 Semiconductor LLC
- Thomas E. Harrington
- H01 - BASIC ELECTRIC ELEMENTS

Thomas E. Harrington III

Person

Patents Grantslast 30 patents

Power semiconductor device with reduced strain

Wide bandgap semiconductor device with sensor element

Power semiconductor device with reduced strain

Gate trench power semiconductor devices having improved deep shield...

Semiconductor devices having gate resistors with low variation in r...

Edge termination structures for semiconductor devices

Super junction MOS bipolar transistor having drain gaps

Termination region architecture for vertical power transistors

Surface devices within a vertical power device

Device architecture and method for precision enhancement of vertica...

Device architecture and method for improved packing of vertical fie...

Source-gate region architecture in a vertical power semiconductor d...

Termination region architecture for vertical power transistors

Surface devices within a vertical power device

Device architecture and method for precision enhancement of vertica...

Device architecture and method for improved packing of vertical fie...

Device architecture and method for improved packing of vertical fie...

Device architecture and method for precision enhancement of vertica...

On-chip electrostatic discharge protection for a semiconductor device

Method of making polysilicon resistor having adjustable temperature...

CMOS integrated circuit with reduced susceptibility to PMOS punchth...

CMOS integrated circuit with reduced susceptibility to PMOS punchth...

Integrated circuit with improved protection against negative transi...

Integrated circuit with improved battery protection

Method of fabricating a CMOS IC with reduced susceptibility to PMOS...

Integrated circuit with improved battery protection

Process for making integrated circuit with doped silicon dioxide lo...

CMOS integrated circuit with reduced susceptibility to PMOS punchth...

Enclosed buried channel transistor

Low leakage battery protection diode structure

Patents Applicationslast 30 patents

WIDE BANDGAP SEMICONDUCTOR DEVICE WITH SENSOR ELEMENT

Power Semiconductor Devices Including Multiple Layer Metallization

POWER SEMICONDUCTOR DEVICE WITH REDUCED STRAIN

POWER SEMICONDUCTOR DEVICE WITH SHALLOW CONDUCTION REGION

SEMICONDUCTOR DEVICES HAVING GATE RESISTORS WITH LOW VARIATION IN R...

WIDE BANDGAP UNIPOLAR/BIPOLAR TRANSISTOR

EDGE TERMINATION STRUCTURES FOR SEMICONDUCTOR DEVICES

MULTIPLE SILICIDE PROCESS FOR SEPARATELY FORMING N-TYPE AND P-TYPE...

POWER SEMICONDUCTOR DEVICES INCLUDING MULTIPLE GATE BOND PADS

SEMICONDUCTOR DEVICES HAVING GATE RESISTORS WITH LOW VARIATION IN R...

POWER SEMICONDUCTOR DEVICE WITH REDUCED STRAIN

PASSIVATION STRUCTURES FOR SEMICONDUCTOR DEVICES

GATE TRENCH POWER SEMICONDUCTOR DEVICES HAVING IMPROVED DEEP SHIELD...

EDGE TERMINATION STRUCTURES FOR SEMICONDUCTOR DEVICES

WIDE BANDGAP SEMICONDUCTOR DEVICE WITH SENSOR ELEMENT

SUPER JUNCTION MOS BIPOLAR TRANSISTOR AND PROCESS OF MANUFACTURE

SURFACE DEVICES WITHIN A VERTICAL POWER DEVICE

Termination Region Architecture for Vertical Power Transistors

SUPER JUNCTION MOS BIPOLAR TRANSISTOR AND PROCESS OF MANUFACTURE

Source-Gate Region Architecture in a Vertical Power Semiconductor D...

SURFACE DEVICES WITHIN A VERTICAL POWER DEVICE

DEVICE ARCHITECTURE AND METHOD FOR PRECISION ENHANCEMENT OF VERTICA...

Termination Region Architecture for Vertical Power Transistors

Source-Gate Region Architecture in a Vertical Power Semiconductor D...

DEVICE ARCHITECTURE AND METHOD FOR IMPROVED PACKING OF VERTICAL FIE...

SURFACE DEVICES WITHIN A VERTICAL POWER DEVICE

DEVICE ARCHITECTURE AND METHOD FOR PRECISION ENHANCEMENT OF VERTICA...

DEVICE ARCHITECTURE AND METHOD FOR IMPROVED PACKING OF VERTICAL FIE...

DEVICE ARCHITECTURE AND METHOD FOR TEMPERATURE COMPENSATION OF VERT...

DEVICE ARCHITECTURE AND METHOD FOR IMPROVED PACKING OF VERTICAL FIE...