Thomas R. Toms

Person

Drippings Springs, TX, US

People

Patents Grantslast 30 patents

Information Patent Grant
System and method to initiate a housekeeping operation at a mobile...
- Patent number 9,014,749
- Issue date Apr 21, 2015
- QUALCOMM Incorporated
- Thomas R. Toms
- G11 - INFORMATION STORAGE
Information Patent Grant
Active thermal control for stacked IC devices
- Patent number 8,987,062
- Issue date Mar 24, 2015
- QUALCOMM Incorporated
- Shiqun Gu
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Low cost die-to-wafer alignment/bond for 3d IC stacking
- Patent number 8,796,073
- Issue date Aug 5, 2014
- QUALCOMM Incorporated
- Shiqun Gu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Active thermal control for stacked IC devices
- Patent number 8,598,700
- Issue date Dec 3, 2013
- QUALCOMM Incorporated
- Shiqun Gu
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Three dimensional inductor, transformer and radio frequency amplifier
- Patent number 8,508,301
- Issue date Aug 13, 2013
- QUALCOMM Incorporated
- Jonghae Kim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Circuit for detecting tier-to-tier couplings in stacked integrated...
- Patent number 8,471,582
- Issue date Jun 25, 2013
- QUALCOMM Incorporated
- Thomas R. Toms
- G01 - MEASURING TESTING
Information Patent Grant
Techniques for placement of active and passive devices within a chip
- Patent number 8,350,358
- Issue date Jan 8, 2013
- QUALCOMM Incorporated
- Jonghae Kim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Techniques for placement of active and passive devices within a chip
- Patent number 8,324,066
- Issue date Dec 4, 2012
- QUALCOMM Incorporated
- Jonghae Kim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
System and method of silicon switched power delivery using a package
- Patent number 8,193,630
- Issue date Jun 5, 2012
- QUALCOMM Incorporated
- Lew G. Chua-Eoan
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Method and apparatus for forming I/O clusters in integrated circuits
- Patent number 8,184,414
- Issue date May 22, 2012
- QUALCOMM Incorporated
- Reza Jalilizeinali
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Three dimensional inductor and transformer
- Patent number 8,143,952
- Issue date Mar 27, 2012
- QUALCOMM Incorporated
- Jonghae Kim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Techniques for placement of active and passive devices within a chip
- Patent number 8,067,816
- Issue date Nov 29, 2011
- QUALCOMM Incorporated
- Jonghae Kim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
System and method of silicon switched power delivery using a package
- Patent number 7,902,654
- Issue date Mar 8, 2011
- QUALCOMM Incorporated
- Lew G. Choa-Eoan
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Testing circuit split between tiers of through silicon stacking chips
- Patent number 7,904,770
- Issue date Mar 8, 2011
- QUALCOMM Incorporated
- Thomas R. Toms
- G01 - MEASURING TESTING
Information Patent Grant
System and method of power distribution control of an integrated ci...
- Patent number 7,812,582
- Issue date Oct 12, 2010
- QUALCOMM Incorporated
- Lew G. Chua-Eoan
- H02 - GENERATION CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
Information Patent Grant
Method and apparatus for performing access censorship in a data pro...
- Patent number 6,499,092
- Issue date Dec 24, 2002
- Motorola, Inc.
- Wallace B. Harwood
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for performing access censorship in a data pro...
- Patent number 6,240,493
- Issue date May 29, 2001
- Motorola, Inc.
- Wallace B. Hardwood
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Decoupled reset dynamic logic circuit
- Patent number 6,133,759
- Issue date Oct 17, 2000
- International Business Machines Corp.
- John Andrew Beck
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Method and apparatus for testing a circuit module concurrently with...
- Patent number 6,076,177
- Issue date Jun 13, 2000
- Motorola, Inc.
- Ivan James Fontenot
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Voltage recovery circuit and method therefor
- Patent number 6,008,677
- Issue date Dec 28, 1999
- Motorola, Inc.
- Cheri Lynn Harrington
- G11 - INFORMATION STORAGE
Information Patent Grant
Flexible configuration of timebases in a timer system
- Patent number 5,631,853
- Issue date May 20, 1997
- Motorola Inc.
- Gary L. Miller
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Block erasable flash EEPROM apparatus and method thereof
- Patent number 5,339,279
- Issue date Aug 16, 1994
- Motorola, Inc.
- Thomas R. Toms
- G11 - INFORMATION STORAGE
Information Patent Grant
Circuitry for automatically entering and terminating an initializat...
- Patent number 5,263,168
- Issue date Nov 16, 1993
- Motorola, Inc.
- Thomas R. Toms
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Bias current generator circuit for a sense amplifier
- Patent number 5,168,466
- Issue date Dec 1, 1992
- Motorola, Inc.
- Clinton C. Kuo
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
ACTIVE THERMAL CONTROL FOR STACKED IC DEVICES
- Publication number 20140043756
- Publication date Feb 13, 2014
- QUALCOMM Incorporated
- Shiqun Gu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Three Dimensional Inductor, Transformer and Radio Frequency Amplifier
- Publication number 20120056680
- Publication date Mar 8, 2012
- QUALCOMM Incorporated
- Jonghae Kim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
System and Method to Initiate a Housekeeping Operation at a Mobile...
- Publication number 20120040712
- Publication date Feb 16, 2012
- QUALCOMM Incorporated
- Thomas R. Toms
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Techniques for Placement of Active and Passive Devices within a Chip
- Publication number 20120040509
- Publication date Feb 16, 2012
- QUALCOMM Incorporated
- Jonghae Kim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Techniques for Placement of Active and Passive Devices within a Chip
- Publication number 20120001297
- Publication date Jan 5, 2012
- QUALCOMM Incorporated
- Jonghae Kim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Systems and Methods Providing Arrangements of Vias
- Publication number 20110193212
- Publication date Aug 11, 2011
- QUALCOMM Incorporated
- Shiqun Gu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
System and Method of Silicon Switched Power Delivery Using a Package
- Publication number 20110111705
- Publication date May 12, 2011
- QUALCOMM Incorporated
- Lew G. Chua-Eoan
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Three Dimensional Inductor and Transformer
- Publication number 20110084765
- Publication date Apr 14, 2011
- QUALCOMM Incorporated
- Jonghae Kim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Photovoltaic Cell Efficiency Using Through Silicon Vias
- Publication number 20100206370
- Publication date Aug 19, 2010
- QUALCOMM Incorporated
- Thomas R. Toms
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Application
Techniques for Placement of Active and Passive Devices Within a Chip
- Publication number 20100193905
- Publication date Aug 5, 2010
- QUALCOMM Incorporated
- Jonghae Kim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Circuit for Detecting Tier-to-Tier Couplings in Stacked Integrated...
- Publication number 20100188114
- Publication date Jul 29, 2010
- QUALCOMM Incorporated
- Thomas R. Toms
- G01 - MEASURING TESTING
Information Patent Application
Embedded Through Silicon Stack 3-D Die In A Package Substrate
- Publication number 20100155931
- Publication date Jun 24, 2010
- QUALCOMM Incorporated
- Urmi Ray
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Parallel Plane Memory and Processor Coupling in a 3-D Micro-Archite...
- Publication number 20100140750
- Publication date Jun 10, 2010
- QUALCOMM Incorporated
- Thomas R. Toms
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Electrostatic Discharge (ESD) Shielding For Stacked ICs
- Publication number 20100091475
- Publication date Apr 15, 2010
- QUALCOMM Incorporated
- Thomas R. Toms
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Low Cost Die-To-Wafer Alignment/Bond For 3d IC Stacking
- Publication number 20100075460
- Publication date Mar 25, 2010
- QUALCOMM Incorporated
- Shiqun Gu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Testing Circuit Split Between Tiers of Through Silicon Stacking Chips
- Publication number 20100060312
- Publication date Mar 11, 2010
- QUALCOMM Incorporated
- Thomas R. Toms
- G01 - MEASURING TESTING
Information Patent Application
Method and Apparatus for Forming I/O Clusters in Integrated Circuits
- Publication number 20100027171
- Publication date Feb 4, 2010
- QUALCOMM Incorporated
- Reza Jalilizeinali
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Active Thermal Control for Stacked IC Devices
- Publication number 20090321909
- Publication date Dec 31, 2009
- QUALCOMM Incorporated
- Shiqun Gu
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
SYSTEM AND METHOD OF POWER DISTRIBUTION CONTROL OF AN INTEGRATED CI...
- Publication number 20080067995
- Publication date Mar 20, 2008
- Lew G. Chua-Eoan
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Application
System and method of silicon switched power delivery using a package
- Publication number 20070262438
- Publication date Nov 15, 2007
- Lew G. Choa-Eoan
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
System and method to determine peak power demand in an integrated c...
- Publication number 20060149527
- Publication date Jul 6, 2006
- Thomas R. Toms
- G06 - COMPUTING CALCULATING COUNTING

Thomas R. Toms

Person

Patents Grantslast 30 patents

System and method to initiate a housekeeping operation at a mobile...

Active thermal control for stacked IC devices

Low cost die-to-wafer alignment/bond for 3d IC stacking

Active thermal control for stacked IC devices

Three dimensional inductor, transformer and radio frequency amplifier

Circuit for detecting tier-to-tier couplings in stacked integrated...

Techniques for placement of active and passive devices within a chip

Techniques for placement of active and passive devices within a chip

System and method of silicon switched power delivery using a package

Method and apparatus for forming I/O clusters in integrated circuits

Three dimensional inductor and transformer

Techniques for placement of active and passive devices within a chip

System and method of silicon switched power delivery using a package

Testing circuit split between tiers of through silicon stacking chips

System and method of power distribution control of an integrated ci...

Method and apparatus for performing access censorship in a data pro...

Method and apparatus for performing access censorship in a data pro...

Decoupled reset dynamic logic circuit

Method and apparatus for testing a circuit module concurrently with...

Voltage recovery circuit and method therefor

Flexible configuration of timebases in a timer system

Block erasable flash EEPROM apparatus and method thereof

Circuitry for automatically entering and terminating an initializat...

Bias current generator circuit for a sense amplifier

Patents Applicationslast 30 patents

ACTIVE THERMAL CONTROL FOR STACKED IC DEVICES

Three Dimensional Inductor, Transformer and Radio Frequency Amplifier

System and Method to Initiate a Housekeeping Operation at a Mobile...

Techniques for Placement of Active and Passive Devices within a Chip

Techniques for Placement of Active and Passive Devices within a Chip

Systems and Methods Providing Arrangements of Vias

System and Method of Silicon Switched Power Delivery Using a Package

Three Dimensional Inductor and Transformer

Photovoltaic Cell Efficiency Using Through Silicon Vias

Techniques for Placement of Active and Passive Devices Within a Chip

Circuit for Detecting Tier-to-Tier Couplings in Stacked Integrated...

Embedded Through Silicon Stack 3-D Die In A Package Substrate

Parallel Plane Memory and Processor Coupling in a 3-D Micro-Archite...

Electrostatic Discharge (ESD) Shielding For Stacked ICs

Low Cost Die-To-Wafer Alignment/Bond For 3d IC Stacking

Testing Circuit Split Between Tiers of Through Silicon Stacking Chips

Method and Apparatus for Forming I/O Clusters in Integrated Circuits

Active Thermal Control for Stacked IC Devices

SYSTEM AND METHOD OF POWER DISTRIBUTION CONTROL OF AN INTEGRATED CI...

System and method of silicon switched power delivery using a package

System and method to determine peak power demand in an integrated c...