Timothy A. Pontius

Person

Crystal Lake, IL, US

People

Patents Grantslast 30 patents

Information Patent Grant
Reordering responses in a high performance on-chip network
- Patent number 10,664,421
- Issue date May 26, 2020
- FACEBOOK TECHNOLOGIES
- Jeremy Chan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Reordering responses in a high performance on-chip network
- Patent number 10,303,628
- Issue date May 28, 2019
- Sonics, Inc.
- Jeremy Chan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods and systems related to a configurable delay counter used wi...
- Patent number 8,294,504
- Issue date Oct 23, 2012
- Synopsys, Inc.
- Timothy Allen Pontius
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Alignment and deskew for multiple lanes of serial interconnect
- Patent number 8,259,755
- Issue date Sep 4, 2012
- NXP B.V.
- Tim Pontius
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Spaced one-hot receiver
- Patent number 8,194,790
- Issue date Jun 5, 2012
- NXP B.V.
- Tim Pontius
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Power management for buses in cmos circuits
- Patent number 8,099,614
- Issue date Jan 17, 2012
- NXP B.V.
- Tim Pontius
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Grant
Two-phase data-transfer protocol
- Patent number 8,078,948
- Issue date Dec 13, 2011
- NXP B.V.
- Timothy Pontius
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Synchronized receiver
- Patent number 8,031,746
- Issue date Oct 4, 2011
- ST-Ericsson SA
- Gerrit Willem Den Besten
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Clock domain crossing FIFO
- Patent number 7,187,741
- Issue date Mar 6, 2007
- NXP B.V.
- Timothy Pontius
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Parallel data communication realignment of data sent in multiple gr...
- Patent number 7,085,950
- Issue date Aug 1, 2006
- Koninklijke Philips Electronics N.V.
- Gregory E. Ehmann
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
High-speed interchip interface protocol
- Patent number 6,996,106
- Issue date Feb 7, 2006
- Koninklijke Philips Electronics N.V.
- Robert L. Payne
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Parallel data communication having skew intolerant data groups
- Patent number 6,839,862
- Issue date Jan 4, 2005
- Koninklijke Philips Electronics N.V.
- David R. Evoy
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Method and arrangement for rapid silicon prototyping
- Patent number 6,665,855
- Issue date Dec 16, 2003
- Koninklijke Philips Electronics N.V.
- Robert Payne
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Parallel communication based on balanced data-bit encoding
- Patent number 6,636,166
- Issue date Oct 21, 2003
- Koninklijke Philips Electronics N.V.
- D. C. Sessions
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Selecting a cache design for a computer system using a model with a...
- Patent number 6,542,855
- Issue date Apr 1, 2003
- Koninklijke Philips Electronics N.V.
- Timothy A. Pontius
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Computer-implemented conversion of combination-logic module for imp...
- Patent number 6,543,030
- Issue date Apr 1, 2003
- Koninklijke Philips Electronics N.V.
- Liewei Bao
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
FIFO system with variable-width interface to host processor
- Patent number 6,513,105
- Issue date Jan 28, 2003
- Koninklijke Philips Electronics N.V.
- Timothy A. Pontius
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Binary data memory design with data stored in low-power sense
- Patent number 6,507,887
- Issue date Jan 14, 2003
- Koninklijke Philips Electronics N.V.
- Timothy A. Pontius
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and arrangement for passing data between a reference chip an...
- Patent number 6,467,010
- Issue date Oct 15, 2002
- Koninklijke Philips Electronics N.V.
- Timothy Pontius
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and arrangement for rapid silicon prototyping
- Patent number 6,347,395
- Issue date Feb 12, 2002
- Koninklijke Philips Electronics N.V. (KPENV)
- Robert Payne
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Non-power-of-two grey-code counter system having binary incrementer...
- Patent number 6,337,893
- Issue date Jan 8, 2002
- Philips Electronics North America Corp.
- Timothy A. Pontius
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Non-power-of-two Gray-code counter and binary incrementer therefor
- Patent number 6,314,154
- Issue date Nov 6, 2001
- VLSI Technology, Inc.
- Timothy A. Pontius
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Method and arrangement for passing data between a reference chip an...
- Patent number 6,154,803
- Issue date Nov 28, 2000
- Philips Semiconductors, Inc.
- Timothy Pontius
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Floating-point processor with operand-format precision greater than...
- Patent number 6,029,243
- Issue date Feb 22, 2000
- VLSI Technology, Inc.
- Timothy A. Pontius
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Binary counter system using bit-wise matches with maximum count
- Patent number 5,978,437
- Issue date Nov 2, 1999
- VLSI Technology, Inc.
- Timothy A. Pontius
- H03 - BASIC ELECTRONIC CIRCUITRY

Patents Applicationslast 30 patents

Information Patent Application
Reordering Responses in a High Performance On-Chip Network
- Publication number 20160188501
- Publication date Jun 30, 2016
- Sonics, Inc.
- Jeremy Chan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INTELLIGENT MESOCHRONOUS SYNCHRONIZER
- Publication number 20150026494
- Publication date Jan 22, 2015
- Sonics, Inc.
- William John Bainbridge
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHODS AND SYSTEMS RELATED TO A CONFIGURABLE DELAY COUNTER USED WI...
- Publication number 20110050313
- Publication date Mar 3, 2011
- Timothy Allen Pontius
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
DATA PROCESSING WITH CIRCUIT MODELING
- Publication number 20100174521
- Publication date Jul 8, 2010
- NXP B.V.
- Timothy Allen Pontius
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SPACED ONE-HOT RECEIVER
- Publication number 20100061428
- Publication date Mar 11, 2010
- NXP, B.V.
- Tim Pontius
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Synchronized Receiver
- Publication number 20080279225
- Publication date Nov 13, 2008
- NXP B.V.
- Gerrit Willem Den Besten
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Alignment and Deskew For Multiple Lanes of Serical Interconnect
- Publication number 20080279224
- Publication date Nov 13, 2008
- Koninklijke Philips Electronics N.V.
- Tim Pontius
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Two-Phase Data-Transfer Protocol
- Publication number 20080270875
- Publication date Oct 30, 2008
- Koninklijke Philips Electronics N.V.
- Timothy A. Pontius
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Power Management for Buses in Cmos Circuits
- Publication number 20080256377
- Publication date Oct 16, 2008
- NXP B.V.
- Tim Pontius
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Access control bus system
- Publication number 20030221030
- Publication date Nov 27, 2003
- Timothy A. Pontius
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND ARRANGEMENT FOR RAPID SILICON PROTOTYPING
- Publication number 20030204831
- Publication date Oct 30, 2003
- VLSI Technology, Inc. (Koninklijke Philips Electronics N.V.).
- Robert Payne
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Configurable synchronous or asynchronous bus interface
- Publication number 20030135675
- Publication date Jul 17, 2003
- Koninklijke Philips Electronics N.V.
- Timothy A. Pontius
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
High-speed interchip interface protocol
- Publication number 20030099238
- Publication date May 29, 2003
- Koninklijke Philips Electronics N.V.
- Robert L. Payne
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Parallel communication based on balanced data-bit encoding
- Publication number 20030088317
- Publication date May 8, 2003
- D.C. Sessions
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Clock domain crossing fifo
- Publication number 20030081713
- Publication date May 1, 2003
- Koninklijke Philips Electronics N.V.
- Timothy Pontius
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Parallel data communication realignment of data sent in multiple gr...
- Publication number 20030065987
- Publication date Apr 3, 2003
- Koninklijke Philips Electronics N.V.
- Gregory E. Ehmann
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Parallel data communication having skew intolerant data groups
- Publication number 20020184552
- Publication date Dec 5, 2002
- David R. Evoy
- H04 - ELECTRIC COMMUNICATION TECHNIQUE

Timothy A. Pontius

Person

Patents Grantslast 30 patents

Reordering responses in a high performance on-chip network

Reordering responses in a high performance on-chip network

Methods and systems related to a configurable delay counter used wi...

Alignment and deskew for multiple lanes of serial interconnect

Spaced one-hot receiver

Power management for buses in cmos circuits

Two-phase data-transfer protocol

Synchronized receiver

Clock domain crossing FIFO

Parallel data communication realignment of data sent in multiple gr...

High-speed interchip interface protocol

Parallel data communication having skew intolerant data groups

Method and arrangement for rapid silicon prototyping

Parallel communication based on balanced data-bit encoding

Selecting a cache design for a computer system using a model with a...

Computer-implemented conversion of combination-logic module for imp...

FIFO system with variable-width interface to host processor

Binary data memory design with data stored in low-power sense

Method and arrangement for passing data between a reference chip an...

Method and arrangement for rapid silicon prototyping

Non-power-of-two grey-code counter system having binary incrementer...

Non-power-of-two Gray-code counter and binary incrementer therefor

Method and arrangement for passing data between a reference chip an...

Floating-point processor with operand-format precision greater than...

Binary counter system using bit-wise matches with maximum count

Patents Applicationslast 30 patents

Reordering Responses in a High Performance On-Chip Network

INTELLIGENT MESOCHRONOUS SYNCHRONIZER

METHODS AND SYSTEMS RELATED TO A CONFIGURABLE DELAY COUNTER USED WI...

DATA PROCESSING WITH CIRCUIT MODELING

SPACED ONE-HOT RECEIVER

Synchronized Receiver

Alignment and Deskew For Multiple Lanes of Serical Interconnect

Two-Phase Data-Transfer Protocol

Power Management for Buses in Cmos Circuits

Access control bus system

METHOD AND ARRANGEMENT FOR RAPID SILICON PROTOTYPING

Configurable synchronous or asynchronous bus interface

High-speed interchip interface protocol

Parallel communication based on balanced data-bit encoding

Clock domain crossing fifo

Parallel data communication realignment of data sent in multiple gr...

Parallel data communication having skew intolerant data groups