Verne Hornback

Person

Colorado Springs, CO, US

People

Patents Grantslast 30 patents

Information Patent Grant
Application of gate edge liner to maintain gate length CD in a repl...
- Patent number 8,384,165
- Issue date Feb 26, 2013
- LSI Corporation
- Richard J. Carter
- H02 - GENERATION CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
Information Patent Grant
Self-aligned cell integration scheme
- Patent number 7,915,122
- Issue date Mar 29, 2011
- Nantero, Inc.
- Richard J. Carter
- B82 - NANO-TECHNOLOGY
Information Patent Grant
Isolated metal plug process for use in fabricating carbon nanotube...
- Patent number 7,884,430
- Issue date Feb 8, 2011
- Nantero, Inc.
- Richard J. Carter
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Isolated metal plug process for use in fabricating carbon nanotube...
- Patent number 7,824,946
- Issue date Nov 2, 2010
- Nantero, Inc.
- Richard J. Carter
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Isolated metal plug process for use in fabricating carbon nanotube...
- Patent number 7,666,701
- Issue date Feb 23, 2010
- Nantero, Inc.
- Richard J. Carter
Information Patent Grant
Application of gate edge liner to maintain gate length CD in a repl...
- Patent number 7,405,116
- Issue date Jul 29, 2008
- LSI Corporation
- Richard J. Carter
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Incorporating dopants to enhance the dielectric properties of metal...
- Patent number 7,312,127
- Issue date Dec 25, 2007
- LSI Corporation
- Wai Lo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Fabrication of trenches with multiple depths on the same substrate
- Patent number 7,189,628
- Issue date Mar 13, 2007
- LSI Logic Corporation
- Mohammad R. Mirbedini
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Incorporating dopants to enhance the dielectric properties of metal...
- Patent number 7,064,062
- Issue date Jun 20, 2006
- LSI Logic Corporation
- Wai Lo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Fabrication of trenches with multiple depths on the same substrate
- Patent number 6,864,152
- Issue date Mar 8, 2005
- LSI Logic Corporation
- Mohammad R. Mirbedini
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of incorporating nitrogen into metal silicate based dielectr...
- Patent number 6,864,141
- Issue date Mar 8, 2005
- LSI Logic Corporation
- Wai Lo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Thin gate dielectric for a CMOS transistor and method of fabricatio...
- Patent number 6,849,512
- Issue date Feb 1, 2005
- LSI Logic Corporation
- Wai Lo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Electronically controlled optically-active device array for high-sp...
- Patent number 6,445,479
- Issue date Sep 3, 2002
- LSI Logic Corporation
- Verne C. Hornback
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Subtractive oxidation method of fabricating a short-length and vert...
- Patent number 6,355,532
- Issue date Mar 12, 2002
- LSI Logic Corporation
- John J. Seliskar
- B82 - NANO-TECHNOLOGY
Information Patent Grant
Interconnect-integrated metal-insulator-metal capacitor and method...
- Patent number 6,342,734
- Issue date Jan 29, 2002
- LSI Logic Corporation
- Derryl D. J. Allman
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Fabrication of metal-insulator-metal capacitive structures
- Patent number 6,177,305
- Issue date Jan 23, 2001
- LSI Logic Corporation
- Verne C. Hornback
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Process for depositing titanium nitride films
- Patent number 6,071,562
- Issue date Jun 6, 2000
- LSI Logic Corporation
- Verne Hornback
- C23 - COATING METALLIC MATERIAL COATING MATERIAL WITH METALLIC MATERIAL CHEMI...
Information Patent Grant
Method for tungsten nucleation from WF.sub.6 using titanium as a re...
- Patent number 5,963,828
- Issue date Oct 5, 1999
- LSI Logic Corporation
- Derryl D.J. Allman
- C23 - COATING METALLIC MATERIAL COATING MATERIAL WITH METALLIC MATERIAL CHEMI...

Patents Applicationslast 30 patents

Information Patent Application
ISOLATED METAL PLUG PROCESS FOR USE IN FABRICATING CARBON NANOTUBE...
- Publication number 20100148277
- Publication date Jun 17, 2010
- Nantero, Inc.
- Richard J. Carter
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
APPLICATION OF GATE EDGE LINER TO MAINTAIN GATE LENGTH CD IN A REPL...
- Publication number 20080308882
- Publication date Dec 18, 2008
- LSI Corporation
- Richard J. Carter
- G02 - OPTICS
Information Patent Application
Self-aligned cell integration scheme
- Publication number 20060281256
- Publication date Dec 14, 2006
- Richard J. Carter
- B82 - NANO-TECHNOLOGY
Information Patent Application
Incorporating dopants to enhance the dielectric properties of metal...
- Publication number 20060166496
- Publication date Jul 27, 2006
- LSI Logic Corporation
- Wai Lo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Application of gate edge liner to maintain gate length CD in a repl...
- Publication number 20060035425
- Publication date Feb 16, 2006
- Richard J. Carter
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Incorporating dopants to enhance the dielectric properties of metal...
- Publication number 20050127458
- Publication date Jun 16, 2005
- LSI Logic Corporation
- Wai Lo
- H01 - BASIC ELECTRIC ELEMENTS

Verne Hornback

Person

Patents Grantslast 30 patents

Application of gate edge liner to maintain gate length CD in a repl...

Self-aligned cell integration scheme

Isolated metal plug process for use in fabricating carbon nanotube...

Isolated metal plug process for use in fabricating carbon nanotube...

Isolated metal plug process for use in fabricating carbon nanotube...

Application of gate edge liner to maintain gate length CD in a repl...

Incorporating dopants to enhance the dielectric properties of metal...

Fabrication of trenches with multiple depths on the same substrate

Incorporating dopants to enhance the dielectric properties of metal...

Fabrication of trenches with multiple depths on the same substrate

Method of incorporating nitrogen into metal silicate based dielectr...

Thin gate dielectric for a CMOS transistor and method of fabricatio...

Electronically controlled optically-active device array for high-sp...

Subtractive oxidation method of fabricating a short-length and vert...

Interconnect-integrated metal-insulator-metal capacitor and method...

Fabrication of metal-insulator-metal capacitive structures

Process for depositing titanium nitride films

Method for tungsten nucleation from WF.sub.6 using titanium as a re...

Patents Applicationslast 30 patents

ISOLATED METAL PLUG PROCESS FOR USE IN FABRICATING CARBON NANOTUBE...

APPLICATION OF GATE EDGE LINER TO MAINTAIN GATE LENGTH CD IN A REPL...

Self-aligned cell integration scheme

Incorporating dopants to enhance the dielectric properties of metal...

Application of gate edge liner to maintain gate length CD in a repl...

Incorporating dopants to enhance the dielectric properties of metal...