Vijay Reddy

Person

Plano, TX, US

People

Patents Grantslast 30 patents

Information Patent Grant
Devices under test
- Patent number 9,778,313
- Issue date Oct 3, 2017
- Texas Instruments Incorporated
- Min Chen
- G01 - MEASURING TESTING
Information Patent Grant
Circuit aging sensor
- Patent number 9,714,966
- Issue date Jul 25, 2017
- Texas Instruments Incorporated
- Min Chen
- G01 - MEASURING TESTING
Information Patent Grant
Methods and systems to determine a final value of random telegraph...
- Patent number 9,110,111
- Issue date Aug 18, 2015
- Texas Instruments Incorporated
- Gautam Kapila
- G01 - MEASURING TESTING
Information Patent Grant
Variability and aging sensor for integrated circuits
- Patent number 9,035,706
- Issue date May 19, 2015
- Texas Instruments Incorporated
- Min Chen
- G01 - MEASURING TESTING
Information Patent Grant
High performance asymmetric cascoded transistor
- Patent number 8,753,941
- Issue date Jun 17, 2014
- Texas Instruments Incorporated
- Kamel Benaissa
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Parameter drift prediction
- Patent number 8,239,814
- Issue date Aug 7, 2012
- Texas Instruments Incorporated
- Vijay Kumar Reddy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Segmented power amplifier with varying segment activation
- Patent number 8,138,829
- Issue date Mar 20, 2012
- Texas Instruments Incorporated
- Vijay Kumar Reddy
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Methodology for assessing degradation due to radio frequency excita...
- Patent number 7,974,595
- Issue date Jul 5, 2011
- Texas Instruments Incorporated
- Vijay Kumar Reddy
- G01 - MEASURING TESTING
Information Patent Grant
Tunable stress technique for reliability degradation measurement
- Patent number 7,952,378
- Issue date May 31, 2011
- Texas Instruments Incorporated
- Andrew Marshall
- G01 - MEASURING TESTING
Information Patent Grant
Current-voltage-based method for evaluating thin dielectrics based...
- Patent number 7,737,717
- Issue date Jun 15, 2010
- Texas Instruments Incorporated
- Paul Edward Nicollian
- G01 - MEASURING TESTING
Information Patent Grant
Methods and systems for determining efficacy of stress protection c...
- Patent number 7,385,383
- Issue date Jun 10, 2008
- Texas Instruments Incorporated
- Vijay Kumar Reddy
- G01 - MEASURING TESTING
Information Patent Grant
Apparatus and methods for ferroelectric ram fatigue testing
- Patent number 7,263,455
- Issue date Aug 28, 2007
- Texas Instruments Incorporated
- John Anthony Rodriguez
- G11 - INFORMATION STORAGE
Information Patent Grant
System and method for accurate negative bias temperature instabilit...
- Patent number 7,218,132
- Issue date May 15, 2007
- Texas Instruments Incorporated
- Anand T. Krishnan
- G01 - MEASURING TESTING
Information Patent Grant
System and method for accurate negative bias temperature instabilit...
- Patent number 7,212,023
- Issue date May 1, 2007
- Texas Instruments Incorporated
- Anand T. Krishnan
- G01 - MEASURING TESTING
Information Patent Grant
PMOS electrostatic discharge (ESD) protection device
- Patent number 7,196,887
- Issue date Mar 27, 2007
- Texas Instruments Incorporated
- Gianluca Boselli
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Versatile system for accelerated stress characterization of semicon...
- Patent number 7,026,838
- Issue date Apr 11, 2006
- Texas Instruments Incorporated
- Vijay Kumar Reddy
- G01 - MEASURING TESTING
Information Patent Grant
Efficient pMOS ESD protection circuit
- Patent number 6,963,111
- Issue date Nov 8, 2005
- Texas Instruments Incorporated
- Vijay K. Reddy
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method and system for determining transistor degradation mechanisms
- Patent number 6,933,731
- Issue date Aug 23, 2005
- Texas Instruments Incorporated
- Vijay Kumar Reddy
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Apparatus and methods for ferroelectric ram fatigue testing
- Patent number 6,928,376
- Issue date Aug 9, 2005
- Texas Instruments Incorporated
- John Anthony Rodriguez
- G11 - INFORMATION STORAGE
Information Patent Grant
Method for measuring NBTI degradation effects on integrated circuits
- Patent number 6,815,970
- Issue date Nov 9, 2004
- Texas Instruments Incorporated
- Timothy A. Rost
- G01 - MEASURING TESTING
Information Patent Grant
Method for improving gate oxide integrity and interface quality in...
- Patent number 6,709,932
- Issue date Mar 23, 2004
- Texas Instruments Incorporated
- Anand T. Krishnan
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
LDMOS NANOSHEET TRANSISTOR
- Publication number 20240413239
- Publication date Dec 12, 2024
- TEXAS INSTRUMENTS INCORPORATED
- Henry Litzmann Edwards
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DEVICES UNDER TEST
- Publication number 20160069950
- Publication date Mar 10, 2016
- TEXAS INSTRUMENTS INCORPORATED
- MIN CHEN
- G01 - MEASURING TESTING
Information Patent Application
VARIABILITY AND AGING SENSOR FOR INTEGRATED CIRCUITS
- Publication number 20140197895
- Publication date Jul 17, 2014
- TEXAS INSTRUMENTS INCORPORATED
- MIN CHEN
- G01 - MEASURING TESTING
Information Patent Application
CIRCUIT AGING SENSOR
- Publication number 20140097856
- Publication date Apr 10, 2014
- TEXAS INSTRUMENTS INCORPORATED
- Min Chen
- G01 - MEASURING TESTING
Information Patent Application
Segmented Power Amplifier with Varying Segment Activation
- Publication number 20110291754
- Publication date Dec 1, 2011
- TEXAS INSTRUMENTS INCORPORATED
- Vijay Kumar Reddy
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Parameter Drift Prediction
- Publication number 20100242001
- Publication date Sep 23, 2010
- Vijay Kumar Reddy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TUNABLE STRESS TECHNIQUE FOR RELIABILITY DEGRADATION MEASUREMENT
- Publication number 20100164531
- Publication date Jul 1, 2010
- TEXAS INSTRUMENTS INCORPORATED
- Andrew Marshall
- G01 - MEASURING TESTING
Information Patent Application
CURRENT-VOLTAGE-BASED METHOD FOR EVALUATING THIN DIELECTRICS BASED...
- Publication number 20090224795
- Publication date Sep 10, 2009
- Texas Instruments Inc.
- Paul Edward Nicollian
- G01 - MEASURING TESTING
Information Patent Application
METHODOLOGY FOR ASSESSING DEGRADATION DUE TO RADIO FREQUENCY EXCITA...
- Publication number 20090167429
- Publication date Jul 2, 2009
- TEXAS INSTRUMENTS INCORPORATED
- Vijay Kumar Reddy
- G01 - MEASURING TESTING
Information Patent Application
Methods and systems for determining efficacy of stress protection c...
- Publication number 20060274473
- Publication date Dec 7, 2006
- TEXAS INSTRUMENTS INCORPORATED
- Vijay Kumar Reddy
- G01 - MEASURING TESTING
Information Patent Application
System and method for accurate negative bias temperature instabilit...
- Publication number 20060076971
- Publication date Apr 13, 2006
- Anand T. Krishnan
- G01 - MEASURING TESTING
Information Patent Application
System and method for accurate negative bias temperature instabilit...
- Publication number 20060049842
- Publication date Mar 9, 2006
- Anand T. Krishnan
- G01 - MEASURING TESTING
Information Patent Application
Versatile system for accelerated stress characterization of semicon...
- Publication number 20050280477
- Publication date Dec 22, 2005
- Vijay Kumar Reddy
- G01 - MEASURING TESTING
Information Patent Application
Apparatus and methods for ferroelectric ram fatigue testing
- Publication number 20050231997
- Publication date Oct 20, 2005
- John Anthony Rodriguez
- G11 - INFORMATION STORAGE
Information Patent Application
Voltage waveform generation circuit
- Publication number 20050218903
- Publication date Oct 6, 2005
- Taxas Instruments Incorported
- Vijay Kumar Reddy
- G01 - MEASURING TESTING
Information Patent Application
Method and system for determining transistor degradation mechanisms
- Publication number 20050086038
- Publication date Apr 21, 2005
- TEXAS INSTRUMENTS INCORPORATED
- Vijay Kumar Reddy
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Efficient pMOS ESD protection circuit
- Publication number 20040251502
- Publication date Dec 16, 2004
- Vijay K. Reddy
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PMOS electrostatic discharge (ESD) protection device
- Publication number 20040240128
- Publication date Dec 2, 2004
- Gianluca Boselli
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Apparatus and methods for ferroelectric ram fatigue testing
- Publication number 20040068674
- Publication date Apr 8, 2004
- John Anthony Rodriguez
- G11 - INFORMATION STORAGE
Information Patent Application
METHOD FOR IMPROVING GATE OXIDE INTEGRITY & INTERFACE QUALITY IN A...
- Publication number 20040043567
- Publication date Mar 4, 2004
- Anand T. Krishnan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method for predicting the degradation of an integrated circuit perf...
- Publication number 20030233624
- Publication date Dec 18, 2003
- TEXAS INSTRUMENTS INCORPORATED
- Vijay K. Reddy
- G01 - MEASURING TESTING
Information Patent Application
Method for measuring NBTI degradation effects on integrated circuits
- Publication number 20030042926
- Publication date Mar 6, 2003
- Timothy A. Rost
- G01 - MEASURING TESTING

Vijay Reddy

Person

Patents Grantslast 30 patents

Devices under test

Circuit aging sensor

Methods and systems to determine a final value of random telegraph...

Variability and aging sensor for integrated circuits

High performance asymmetric cascoded transistor

Parameter drift prediction

Segmented power amplifier with varying segment activation

Methodology for assessing degradation due to radio frequency excita...

Tunable stress technique for reliability degradation measurement

Current-voltage-based method for evaluating thin dielectrics based...

Methods and systems for determining efficacy of stress protection c...

Apparatus and methods for ferroelectric ram fatigue testing

System and method for accurate negative bias temperature instabilit...

System and method for accurate negative bias temperature instabilit...

PMOS electrostatic discharge (ESD) protection device

Versatile system for accelerated stress characterization of semicon...

Efficient pMOS ESD protection circuit

Method and system for determining transistor degradation mechanisms

Apparatus and methods for ferroelectric ram fatigue testing

Method for measuring NBTI degradation effects on integrated circuits

Method for improving gate oxide integrity and interface quality in...

Patents Applicationslast 30 patents

LDMOS NANOSHEET TRANSISTOR

DEVICES UNDER TEST

VARIABILITY AND AGING SENSOR FOR INTEGRATED CIRCUITS

CIRCUIT AGING SENSOR

Segmented Power Amplifier with Varying Segment Activation

Parameter Drift Prediction

TUNABLE STRESS TECHNIQUE FOR RELIABILITY DEGRADATION MEASUREMENT

CURRENT-VOLTAGE-BASED METHOD FOR EVALUATING THIN DIELECTRICS BASED...

METHODOLOGY FOR ASSESSING DEGRADATION DUE TO RADIO FREQUENCY EXCITA...

Methods and systems for determining efficacy of stress protection c...

System and method for accurate negative bias temperature instabilit...

System and method for accurate negative bias temperature instabilit...

Versatile system for accelerated stress characterization of semicon...

Apparatus and methods for ferroelectric ram fatigue testing

Voltage waveform generation circuit

Method and system for determining transistor degradation mechanisms

Efficient pMOS ESD protection circuit

PMOS electrostatic discharge (ESD) protection device

Apparatus and methods for ferroelectric ram fatigue testing

METHOD FOR IMPROVING GATE OXIDE INTEGRITY & INTERFACE QUALITY IN A...

Method for predicting the degradation of an integrated circuit perf...

Method for measuring NBTI degradation effects on integrated circuits