W. James Scheuermann

Person

Saratoga, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Control node for multi-core system
- Patent number 10,817,184
- Issue date Oct 27, 2020
- Cornami, Inc.
- W. James Scheuermann
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Control node for multi-core system
- Patent number 10,185,502
- Issue date Jan 22, 2019
- Cornami, Inc.
- W. James Scheuermann
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Hardware task manager
- Patent number 9,665,397
- Issue date May 30, 2017
- Cornami, Inc.
- W. James Scheuermann
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Hardware task manager
- Patent number 8,782,196
- Issue date Jul 15, 2014
- Sviral, Inc.
- W. James Scheuermann
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and system for reconfigurable channel coding
- Patent number 8,767,804
- Issue date Jul 1, 2014
- QST Holdings LLC
- W. James Scheuermann
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Method and system for reconfigurable channel coding
- Patent number 8,249,135
- Issue date Aug 21, 2012
- QST Holdings LLC
- W. James Scheuermann
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Hardware task manager
- Patent number 8,200,799
- Issue date Jun 12, 2012
- QST Holdings LLC
- W. James Scheuermann
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Processor for video data encoding/decoding
- Patent number 8,130,825
- Issue date Mar 6, 2012
- NVIDIA Corporation
- W. James Scheuermann
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Reconfigurable filter node for an adaptive computing machine
- Patent number 8,126,949
- Issue date Feb 28, 2012
- NVIDIA Corporation
- W. James Scheuermann
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Processor for video data
- Patent number 8,018,463
- Issue date Sep 13, 2011
- NVIDIA Corporation
- W. James Scheuermann
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Method and system for reconfigurable channel coding
- Patent number 7,822,109
- Issue date Oct 26, 2010
- QST Holdings, LLC
- W. James Scheuermann
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Method and system for reconfigurable channel coding
- Patent number 7,809,050
- Issue date Oct 5, 2010
- QST Holdings, LLC
- W. James Scheuermann
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Hardware task manager
- Patent number 7,653,710
- Issue date Jan 26, 2010
- QST Holdings, LLC
- W. James Scheuermann
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and system for reducing the time-to-market concerns for embe...
- Patent number 7,620,678
- Issue date Nov 17, 2009
- NVIDIA Corporation
- Paul L. Master
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Processing architecture for a reconfigurable arithmetic node
- Patent number 7,433,909
- Issue date Oct 7, 2008
- NVIDIA Corporation
- W. James Scheuermann
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Reconfigurable filter node for an adaptive computing machine
- Patent number 7,353,243
- Issue date Apr 1, 2008
- NVIDIA Corporation
- W. James Scheuermann
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Configurable finite state machine for operation of microinstruction...
- Patent number 7,231,508
- Issue date Jun 12, 2007
- Quicksilver Technologies
- Paul L. Master
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Data distributor in a computation unit forwarding network data to s...
- Patent number 7,225,279
- Issue date May 29, 2007
- NVIDIA Corporation
- W. James Scheuermann
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
High performance memory efficient variable-length coding decoder
- Patent number 6,587,057
- Issue date Jul 1, 2003
- QuickSilver Technology, Inc.
- W. James Scheuermann
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Method and system for reconfigurable channel coding
- Patent number 6,577,678
- Issue date Jun 10, 2003
- Quicksilver Technology
- W. James Scheuermann
- H04 - ELECTRIC COMMUNICATION TECHNIQUE

Patents Applicationslast 30 patents

Information Patent Application
Control Node For Multi-Core System
- Publication number 20190155518
- Publication date May 23, 2019
- Cornami, Inc.
- W. James Scheuermann
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Control Node For Multi-Core System
- Publication number 20170262193
- Publication date Sep 14, 2017
- Cornami, Inc.
- W. James Scheuermann
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND SYSTEM FOR RECONFIGURABLE CHANNEL CODING
- Publication number 20150003541
- Publication date Jan 1, 2015
- QST Holdings LLC
- W. James Scheuermann
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
HARDWARE TASK MANAGER
- Publication number 20140331231
- Publication date Nov 6, 2014
- W. James Scheuermann
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HARDWARE TASK MANAGER
- Publication number 20130117404
- Publication date May 9, 2013
- Sviral, Inc.
- W. James Scheuermann
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND SYSTEM FOR RECONFIGURABLE CHANNEL CODING
- Publication number 20130044792
- Publication date Feb 21, 2013
- W. James Scheuermann
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
METHOD AND SYSTEM FOR RECONFIGURABLE CHANNEL CODING
- Publication number 20110002409
- Publication date Jan 6, 2011
- QST Holdings, LLC
- W. James Scheuermann
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
HARDWARE TASK MANAGER
- Publication number 20100037029
- Publication date Feb 11, 2010
- QST HOLDINGS LLC
- W. James SCHEUERMANN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND SYSTEM FOR RECONFIGURABLE CHANNEL CODING
- Publication number 20100027597
- Publication date Feb 4, 2010
- QST Holdings, LLC
- W. James Scheuermann
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Processor for video data encoding/decoding
- Publication number 20080130742
- Publication date Jun 5, 2008
- QuickSilver Technology, Inc.
- W. James Scheuermann
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Computer processor architecture selectively using finite-state-mach...
- Publication number 20070271440
- Publication date Nov 22, 2007
- Quicksilver Technology, Inc.
- Paul L. Master
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Processor for video data
- Publication number 20070200857
- Publication date Aug 30, 2007
- QuickSilver Technology, Inc.
- W. James Scheuermann
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Reconfigurable filter node for an adaptive computing machine
- Publication number 20040078403
- Publication date Apr 22, 2004
- Quicksilver Technology, Inc.
- W. James Scheuermann
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Processing architecture for a reconfigurable arithmetic node
- Publication number 20040030736
- Publication date Feb 12, 2004
- Quicksilver Technology, Inc.
- W. James Scheuermann
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Hardware task manager
- Publication number 20040025159
- Publication date Feb 5, 2004
- Quicksilver Technology, Inc.
- W. James Scheuermann
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and system for data flow control of execution nodes of an ad...
- Publication number 20040015970
- Publication date Jan 22, 2004
- W. James Scheuermann
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Uniform interface for a functional node in an adaptive computing en...
- Publication number 20040010645
- Publication date Jan 15, 2004
- Quicksilver Technology, Inc.
- W. James Scheuermann
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and system for reconfigurable channel coding
- Publication number 20030190910
- Publication date Oct 9, 2003
- W. James Scheuermann
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Computer processor architecture selectively using finite-state-mach...
- Publication number 20030115553
- Publication date Jun 19, 2003
- Quicksilver Technology, Inc.
- Paul L. Master
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
High performance memory efficient variable-length coding decoder
- Publication number 20030085822
- Publication date May 8, 2003
- W. James Scheuermann
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Method and system for an interconnection network to support communi...
- Publication number 20030018781
- Publication date Jan 23, 2003
- W. James Scheuermann
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and system for reconfigurable channel coding
- Publication number 20020168018
- Publication date Nov 14, 2002
- W. James Scheuermann
- H04 - ELECTRIC COMMUNICATION TECHNIQUE

W. James Scheuermann

Person

Patents Grantslast 30 patents

Control node for multi-core system

Control node for multi-core system

Hardware task manager

Hardware task manager

Method and system for reconfigurable channel coding

Method and system for reconfigurable channel coding

Hardware task manager

Processor for video data encoding/decoding

Reconfigurable filter node for an adaptive computing machine

Processor for video data

Method and system for reconfigurable channel coding

Method and system for reconfigurable channel coding

Hardware task manager

Method and system for reducing the time-to-market concerns for embe...

Processing architecture for a reconfigurable arithmetic node

Reconfigurable filter node for an adaptive computing machine

Configurable finite state machine for operation of microinstruction...

Data distributor in a computation unit forwarding network data to s...

High performance memory efficient variable-length coding decoder

Method and system for reconfigurable channel coding

Patents Applicationslast 30 patents

Control Node For Multi-Core System

Control Node For Multi-Core System

METHOD AND SYSTEM FOR RECONFIGURABLE CHANNEL CODING

HARDWARE TASK MANAGER

HARDWARE TASK MANAGER

METHOD AND SYSTEM FOR RECONFIGURABLE CHANNEL CODING

METHOD AND SYSTEM FOR RECONFIGURABLE CHANNEL CODING

HARDWARE TASK MANAGER

METHOD AND SYSTEM FOR RECONFIGURABLE CHANNEL CODING

Processor for video data encoding/decoding

Computer processor architecture selectively using finite-state-mach...

Processor for video data

Reconfigurable filter node for an adaptive computing machine

Processing architecture for a reconfigurable arithmetic node

Hardware task manager

Method and system for data flow control of execution nodes of an ad...

Uniform interface for a functional node in an adaptive computing en...

Method and system for reconfigurable channel coding

Computer processor architecture selectively using finite-state-mach...

High performance memory efficient variable-length coding decoder

Method and system for an interconnection network to support communi...

Method and system for reconfigurable channel coding