Wenhe Lin

Person

Singapore, SG

People

Patents Grantslast 30 patents

Information Patent Grant
Spacer-less low-K dielectric processes
- Patent number 8,624,329
- Issue date Jan 7, 2014
- GLOBALFOUNDRIES Singapore Pte. Ltd.
- Yong Meng Lee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Poly profile engineering to modulate spacer induced stress for devi...
- Patent number 8,519,445
- Issue date Aug 27, 2013
- GLOBALFOUNDRIES Singapore Pte. Ltd.
- Vincent Ho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Double anneal with improved reliability for dual contact etch stop...
- Patent number 8,148,221
- Issue date Apr 3, 2012
- International Business Machines Corporation
- Khee Yong Lim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method to remove spacer after salicidation to enhance contact etch...
- Patent number 7,999,325
- Issue date Aug 16, 2011
- GLOBALFOUNDRIES Singapore Pte. Ltd.
- Young Way Teh
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Poly profile engineering to modulate spacer induced stress for devi...
- Patent number 7,993,997
- Issue date Aug 9, 2011
- GLOBALFOUNDRIES Singapore Pte. Ltd.
- Vincent Ho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method and apparatus for post silicide spacer removal
- Patent number 7,977,185
- Issue date Jul 12, 2011
- International Business Machines Corporation
- Brian J. Greene
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Double anneal with improved reliability for dual contact etch stop...
- Patent number 7,615,433
- Issue date Nov 10, 2009
- Chartered Semiconductor Manufacturing, Ltd.
- Khee Yong Lim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Spacer-less low-k dielectric processes
- Patent number 7,615,427
- Issue date Nov 10, 2009
- Chartered Semiconductor Manufacturing, Ltd.
- Yong Meng Lee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method to remove spacer after salicidation to enhance contact etch...
- Patent number 7,445,978
- Issue date Nov 4, 2008
- Chartered Semiconductor Manufacturing, Ltd.
- Young Way Teh
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Composite stress spacer
- Patent number 7,256,084
- Issue date Aug 14, 2007
- Chartered Semiconductor Manufacturing Ltd.
- Khee Yong Lim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of fabricating a gate dielectric layer with reduced gate tun...
- Patent number 7,022,625
- Issue date Apr 4, 2006
- Chartered Semiconductor Manufacturing Ltd.
- Chew Hoe Ang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Dual metal gate process: metals and their silicides
- Patent number 7,005,716
- Issue date Feb 28, 2006
- Chartered Semiconductor Manufacturing Ltd.
- Wenhe Lin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods to form dual metal gates by incorporating metals and their...
- Patent number 6,891,233
- Issue date May 10, 2005
- Chartered Semiconductor Manufacturing Ltd.
- Wenhe Lin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods to form dual metal gates by incorporating metals and their...
- Patent number 6,835,989
- Issue date Dec 28, 2004
- Chartered Semiconductor Manufacturing Ltd.
- Wenhe Lin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Dual metal gate process: metals and their silicides
- Patent number 6,750,519
- Issue date Jun 15, 2004
- Chartered Semiconductor Manufacturing Ltd.
- Wenhe Lin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of fabricating a CMOS device with integrated super-steep ret...
- Patent number 6,743,291
- Issue date Jun 1, 2004
- Chartered Semiconductor Manufacturing Ltd.
- Chew Hoe Ang
- C30 - CRYSTAL GROWTH
Information Patent Grant
Dual Si-Ge polysilicon gate with different Ge concentrations for CM...
- Patent number 6,709,912
- Issue date Mar 23, 2004
- Chartered Semiconductor Manufacturing Ltd.
- Chew-Hoe Ang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods to form dual metal gates by incorporating metals and their...
- Patent number 6,677,652
- Issue date Jan 13, 2004
- Chartered Semiconductor Manufacturing Ltd.
- Wenhe Lin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Triple gate oxide process with high-k gate dielectric
- Patent number 6,670,248
- Issue date Dec 30, 2003
- Chartered Semiconductor Manufacturing Ltd.
- Chew Hoe Ang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for forming L-shaped spacers with precise width control
- Patent number 6,664,156
- Issue date Dec 16, 2003
- Chartered Semiconductor Manufacturing, Ltd.
- Chew Hoe Ang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method to reduce variation in LDD series resistance
- Patent number 6,534,388
- Issue date Mar 18, 2003
- Chartered Semiconductor Manufacturing Ltd.
- Wenhe Lin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of forming dual thickness gate dielectric structures via use...
- Patent number 6,524,910
- Issue date Feb 25, 2003
- Chartered Semiconductor Manufacturing Ltd.
- Wenhe Lin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method to form zirconium oxide and hafnium oxide for high dielectri...
- Patent number 6,486,080
- Issue date Nov 26, 2002
- Chartered Semiconductor Manufacturing Ltd.
- Simon Chooi
- C23 - COATING METALLIC MATERIAL COATING MATERIAL WITH METALLIC MATERIAL CHEMI...
Information Patent Grant
Dual metal gate process: metals and their silicides
- Patent number 6,475,908
- Issue date Nov 5, 2002
- Chartered Semiconductor Manufacturing Ltd.
- Wenhe Lin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods to form dual metal gates by incorporating metals and their...
- Patent number 6,458,695
- Issue date Oct 1, 2002
- Chartered Semiconductor Manufacturing Ltd.
- Wenhe Lin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Dual gate oxide process with reduced thermal distribution of thin-g...
- Patent number 6,403,425
- Issue date Jun 11, 2002
- Chartered Semiconductor Manufacturing Ltd.
- Chew-Hoe Ang
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
POLY PROFILE ENGINEERING TO MODULATE SPACER INDUCED STRESS FOR DEVI...
- Publication number 20110266628
- Publication date Nov 3, 2011
- GLOBALFOUNDRIES SINGAPORE PTE. LTD.
- Vincent HO
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Spacer-less Low-K Dielectric Processes
- Publication number 20100059831
- Publication date Mar 11, 2010
- CHARTERED SEMICONDUCTOR MANUFACTURING, LTD.
- Yong Meng Lee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Double Anneal with Improved Reliability for Dual Contact Etch Stop...
- Publication number 20100041242
- Publication date Feb 18, 2010
- International Business Machines Corporation
- Khee Yong LIM
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Implantation for shallow trench isolation (STI) formation and for s...
- Publication number 20090315115
- Publication date Dec 24, 2009
- CHARTERED SEMICONDUCTOR MANUFACTURING, LTD.
- Beichao Zhang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
POLY PROFILE ENGINEERING TO MODULATE SPACER INDUCED STRESS FOR DEVI...
- Publication number 20090085122
- Publication date Apr 2, 2009
- Vincent Ho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD TO REMOVE SPACER AFTER SALICIDATION TO ENHANCE CONTACT ETCH...
- Publication number 20090026549
- Publication date Jan 29, 2009
- CHARTERED SEMICONDUCTOR MANUFACTURING, LTD.
- Young Way Teh
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR SYSTEM HAVING COMPLEMENTARY STRAINED CHANNELS
- Publication number 20080315317
- Publication date Dec 25, 2008
- Chartered Semiconductor Manufacturing LTD.
- Chung Woh Lai
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
HOT CARRIER DEGRADATION REDUCTION USING ION IMPLANTATION OF SILICON...
- Publication number 20080128834
- Publication date Jun 5, 2008
- International Business Machines Corporation
- Haining Yang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
FET STRUCTURE USING DISPOSABLE SPACER AND STRESS INDUCING LAYER
- Publication number 20080124880
- Publication date May 29, 2008
- Chartered Semiconductor Manufacturing LTD.
- Wenhe Lin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Spacer-less low-k dielectric processes
- Publication number 20070281410
- Publication date Dec 6, 2007
- CHARTERED SEMICONDUCTOR MANUFACTURING, LTD.
- Yong Meng Lee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD AND APPARATUS FOR POST SILICIDE SPACER REMOVAL
- Publication number 20070161244
- Publication date Jul 12, 2007
- International Business Machines Corporation
- Brian J. Greene
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Double anneal with improved reliability for dual contact etch stop...
- Publication number 20070138564
- Publication date Jun 21, 2007
- CHARTERED SEMICONDUCTOR MFG, LTD
- Khee Yong Lim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Composite stress spacer
- Publication number 20060252194
- Publication date Nov 9, 2006
- Chartered Semiconductor Manufacturing Ltd.
- Khee Yong Lim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method to remove spacer after salicidation to enhance contact etch...
- Publication number 20060249794
- Publication date Nov 9, 2006
- CHARTERED SEMICONDUCTOR MANUFACTURING, LTD.
- Young Way Teh
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
HOT CARRIER DEGRADATION REDUCTION USING ION IMPLANTATION OF SILICON...
- Publication number 20060151843
- Publication date Jul 13, 2006
- International Business Machines Corporation
- Haining Yang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Dual metal gate process: metals and their silicides
- Publication number 20040217429
- Publication date Nov 4, 2004
- Chartered Semiconductor Manufacturing Ltd.
- Wenhe Lin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Methods to form dual metal gates by incorporating metals and their...
- Publication number 20040132239
- Publication date Jul 8, 2004
- Chartered Semiconductor Manufacturing Ltd.
- Wenhe Lin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Methods to form dual metal gates by incorporating metals and their...
- Publication number 20040132296
- Publication date Jul 8, 2004
- Chartered Semiconductor Manufacturing Ltd.
- Wenhe Lin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Dual metal gate process: metals and their silicides
- Publication number 20040065930
- Publication date Apr 8, 2004
- CHARTERED SEMICONDUCTOR MANUFACTURING, LTD.
- Wenhe Lin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method of fabricating a gate dielectric layer with reduced gate tun...
- Publication number 20040018674
- Publication date Jan 29, 2004
- Chartered Semiconductor Manufacturing Ltd.
- Chew Hoe Ang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method of fabricating a CMOS device with integrated super-steep ret...
- Publication number 20040007170
- Publication date Jan 15, 2004
- Chartered Semiconductor Manufacturing Ltd.
- Chew Hoe Ang
- C30 - CRYSTAL GROWTH
Information Patent Application
Methods to form dual metal gates by incorporating metals and their...
- Publication number 20030075766
- Publication date Apr 24, 2003
- Chartered Semiconductor Manufacturing Ltd.
- Wenhe Lin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method to form zirconium oxide and hafnium oxide for high dielectri...
- Publication number 20020064970
- Publication date May 30, 2002
- Chartered Semiconductor Manufacturing Inc.
- Simon Chooi
- C23 - COATING METALLIC MATERIAL COATING MATERIAL WITH METALLIC MATERIAL CHEMI...

Person

Patents Grantslast 30 patents

Spacer-less low-K dielectric processes

Poly profile engineering to modulate spacer induced stress for devi...

Double anneal with improved reliability for dual contact etch stop...

Method to remove spacer after salicidation to enhance contact etch...

Poly profile engineering to modulate spacer induced stress for devi...

Method and apparatus for post silicide spacer removal

Double anneal with improved reliability for dual contact etch stop...

Spacer-less low-k dielectric processes

Method to remove spacer after salicidation to enhance contact etch...

Composite stress spacer

Method of fabricating a gate dielectric layer with reduced gate tun...

Dual metal gate process: metals and their silicides

Methods to form dual metal gates by incorporating metals and their...

Methods to form dual metal gates by incorporating metals and their...

Dual metal gate process: metals and their silicides

Method of fabricating a CMOS device with integrated super-steep ret...

Dual Si-Ge polysilicon gate with different Ge concentrations for CM...

Methods to form dual metal gates by incorporating metals and their...

Triple gate oxide process with high-k gate dielectric

Method for forming L-shaped spacers with precise width control

Method to reduce variation in LDD series resistance

Method of forming dual thickness gate dielectric structures via use...

Method to form zirconium oxide and hafnium oxide for high dielectri...

Dual metal gate process: metals and their silicides

Methods to form dual metal gates by incorporating metals and their...

Dual gate oxide process with reduced thermal distribution of thin-g...

Patents Applicationslast 30 patents

POLY PROFILE ENGINEERING TO MODULATE SPACER INDUCED STRESS FOR DEVI...

Spacer-less Low-K Dielectric Processes

Double Anneal with Improved Reliability for Dual Contact Etch Stop...

Implantation for shallow trench isolation (STI) formation and for s...

POLY PROFILE ENGINEERING TO MODULATE SPACER INDUCED STRESS FOR DEVI...

METHOD TO REMOVE SPACER AFTER SALICIDATION TO ENHANCE CONTACT ETCH...

SEMICONDUCTOR SYSTEM HAVING COMPLEMENTARY STRAINED CHANNELS

HOT CARRIER DEGRADATION REDUCTION USING ION IMPLANTATION OF SILICON...

FET STRUCTURE USING DISPOSABLE SPACER AND STRESS INDUCING LAYER

Spacer-less low-k dielectric processes

METHOD AND APPARATUS FOR POST SILICIDE SPACER REMOVAL

Double anneal with improved reliability for dual contact etch stop...

Composite stress spacer

Method to remove spacer after salicidation to enhance contact etch...

HOT CARRIER DEGRADATION REDUCTION USING ION IMPLANTATION OF SILICON...

Dual metal gate process: metals and their silicides

Methods to form dual metal gates by incorporating metals and their...

Methods to form dual metal gates by incorporating metals and their...

Dual metal gate process: metals and their silicides

Method of fabricating a gate dielectric layer with reduced gate tun...

Method of fabricating a CMOS device with integrated super-steep ret...

Methods to form dual metal gates by incorporating metals and their...

Method to form zirconium oxide and hafnium oxide for high dielectri...