TREA

METHOD AND APPARATUS FOR POST SILICIDE SPACER REMOVAL

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Information

  • Patent Application
  • 20070161244
  • Publication Number
    20070161244
  • Date Filed
    November 22, 2005
    18 years ago
  • Date Published
    July 12, 2007
    17 years ago
Information
Abstract
A method (and apparatus) of post silicide spacer removal includes preventing damage to the silicide spacer through the use of at least one of an oxide layer and a nitride layer.
Description

BRIEF DESCRIPTION OF THE DRAWINGS

The foregoing and other exemplary purposes, aspects and advantages will be better understood from the following detailed description of an exemplary embodiment of the invention with reference to the drawings, in which:



FIG. 1A illustrates a partially processed MOSFET 100 after a silicidation and prior to removal of the nitride spacer according to an exemplary embodiment of the present invention;



FIG. 1B illustrates a partially processed MOSFET 100 after the nitride spacer has been removed using a method of post silicide spacer removal according to an exemplary embodiment of the present invention;



FIG. 2 depicts a flow diagram of a method 200 of post silicide spacer removal according to an exemplary embodiment of the present invention;



FIG. 3A illustrates processing of a MOSFET 300 (similar to the MOSFET 100 depicted in FIG. 1) in the method 200 of post silicide spacer removal according to an exemplary embodiment of the present invention;



FIG. 3B illustrates deposition of an oxide layer 307 in the method 200 of post silicide spacer removal according to an exemplary embodiment of the present invention;



FIG. 3C illustrates deposition of a nitride layer 308 in the method 200 of post silicide spacer removal according to an exemplary embodiment of the present invention;



FIG. 3D illustrates etching of the nitride layer 308 in the method 200 of post silicide spacer removal according to an exemplary embodiment of the present invention;



FIG. 3E illustrates etching of the oxide layer 307 in the method 200 of post suicide spacer removal according to an exemplary embodiment of the present invention;



FIG. 3F illustrates etching the nitride from the wafer in the method 200 of post silicide spacer removal according to an exemplary embodiment of the present invention;



FIG. 3G illustrates reactive ion etching (RIE) of the spacer 302 in the method 200 of post silicide spacer removal according to an exemplary embodiment of the present invention;



FIG. 3H illustrates depositing a stressed nitride layer 314 over the wafer 300 in the method 200 of post silicide spacer removal according to an exemplary embodiment of the present invention; and



FIG. 4 depicts a block diagram illustrating a system 400 for post silicide spacer removal according to an exemplary embodiment of the present invention.


Claims
  • 1. A method of post suicide spacer removal, comprising: preventing damage to the silicide through use of at least one of an oxide layer and a nitride layer.
  • 2. The method according to claim 1, further comprising: depositing said oxide layer over a surface of a post silicide wafer, said oxide layer being deposited over said spacer and said silicide, said spacer and said silicide being formed on a substrate of said post silicide wafer.
  • 3. The method according to claim 2, wherein said oxide layer is deposited conformally over said post silicide wafer.
  • 4. The method according to claim 2, further comprising: depositing said nitride layer over said oxide layer.
  • 5. The method according to claim 2, wherein said nitride layer is deposited non-conformally over said oxide layer.
  • 6. The method according to claim 4, wherein said nitride layer is deposited such that a vertical portion of said nitride layer comprises a thickness that is smaller than a thickness of a horizontal portion of said nitride layer.
  • 7. The method according to claim 4, further comprising: etching said nitride layer to expose a portion of the oxide layer disposed on a sidewall of said spacer.
  • 8. The method according to claim 7, further comprising: etching the portion of the oxide layer which was exposed by said etching said nitride layer to expose said spacer.
  • 9. The method according to claim 8, wherein said etching the portion of the oxide layer comprises a short oxide etch.
  • 10. The method according to claim 8, further comprising removing said spacer and a remaining portion of said nitride layer.
  • 11. The method according to claim 10, further comprising: removing a remaining portion of said oxide layer.
  • 12. The method according to claim 10, further comprising: depositing a stressed nitride layer over said post silicide wafer.
  • 13. The method according to claim 1, further comprising: removing said spacer without impacting said silicide.
  • 14. The method according to claim 13, further comprising: depositing a stressed nitride layer over said post silicide wafer.
  • 15. The method according to claim 2, wherein said oxide layer comprises a thickness in a range of 20 Å to 500 Å.
  • 16. The method according to claim 2, wherein said oxide layer comprises a thickness in a range of 50 Å to 100 Å.
  • 17. The method according to claim 4, wherein said nitride layer comprises a thickness in a range of 50 Å to 1000 Å.
  • 18. The method according to claim 6, wherein said vertical portion of said nitride layer comprises a thickness in a range of 0 Å to 500 Å and said horizontal portion of said nitride layer comprises a thickness in a range of 100 Å to 1000 Å.
  • 19. A method of post silicide spacer removal, comprising: depositing an oxide layer over a spacer and a silicide; anddepositing a nitride layer over said oxide layer.
  • 20. A method of post silicide spacer removal, comprising: removing said spacer without impacting said silicide; anddepositing a stressed nitride layer over said post silicide wafer.