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William S. Graupp

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  • Aurora, OR, US
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Patents Grantslast 30 patents

Patents Applicationslast 30 patents

  • Information Patent Application

    HIERARCHICAL FILL IN A DESIGN LAYOUT
    • Publication number 20160098512
    • Publication date Apr 7, 2016
    • Mentor Graphics Corporation
    • Fedor Pikus
    • G06 - COMPUTING CALCULATING COUNTING
  • Information Patent Application

    Wrap Based Fill In Layout Designs
    • Publication number 20140201694
    • Publication date Jul 17, 2014
    • Mentor Graphics Corporation
    • William S. Graupp
    • G06 - COMPUTING CALCULATING COUNTING
  • Information Patent Application

    ANALYSIS OPTIMIZER
    • Publication number 20130305195
    • Publication date Nov 14, 2013
    • Mentor Graphics Corporation
    • Juan Andres Torres Robles
    • G06 - COMPUTING CALCULATING COUNTING
  • Information Patent Application

    ANALYSIS OPTIMZER
    • Publication number 20120144351
    • Publication date Jun 7, 2012
    • Mentor Graphics Corporation
    • Juan Andres Torres Robles
    • G06 - COMPUTING CALCULATING COUNTING
  • Information Patent Application

    GATE MODELING FOR SEMICONDUCTOR FABRICATION PROCESS EFFECTS
    • Publication number 20120144350
    • Publication date Jun 7, 2012
    • Mentor Graphics Corporation
    • Jean-Marie Brunet
    • G06 - COMPUTING CALCULATING COUNTING
  • Information Patent Application

    GATE MODELING FOR SEMICONDUCTOR FABRICATION PROCESS EFFECTS
    • Publication number 20090276749
    • Publication date Nov 5, 2009
    • Mentor Graphics Corporation
    • Jean-Marie Brunet
    • G06 - COMPUTING CALCULATING COUNTING
  • Information Patent Application

    ANALYSIS OPTIMIZER
    • Publication number 20080141195
    • Publication date Jun 12, 2008
    • Juan Andres Torres Robles
    • G06 - COMPUTING CALCULATING COUNTING
  • Information Patent Application

    Interconnection modeling for semiconductor fabrication process effects
    • Publication number 20070204256
    • Publication date Aug 30, 2007
    • Mentor Graphics Corporation
    • Jean-Marie Brunet
    • G06 - COMPUTING CALCULATING COUNTING
  • Information Patent Application

    Gate modeling for semiconductor fabrication process effects
    • Publication number 20070204242
    • Publication date Aug 30, 2007
    • Mentor Graphics Corporation
    • Jean-Marie Brunet
    • G06 - COMPUTING CALCULATING COUNTING