William S. Wu

Person

Cupertino, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Method and system for binary cache cleanup
- Patent number 9,235,530
- Issue date Jan 12, 2016
- SanDisk Technologies Inc.
- William Wu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Non-volatile memory and method having block management with hot/col...
- Patent number 9,176,864
- Issue date Nov 3, 2015
- SanDisk Technologies, Inc
- Sergey Anatolievich Gorobets
- G11 - INFORMATION STORAGE
Information Patent Grant
Fast translation indicator to reduce secondary address table checks...
- Patent number 9,104,327
- Issue date Aug 11, 2015
- SanDisk Technologies Inc.
- Sergey Anatolievich Gorobets
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Defective block management
- Patent number 9,070,449
- Issue date Jun 30, 2015
- SanDisk Technologies Inc.
- Nian Niles Yang
- G11 - INFORMATION STORAGE
Information Patent Grant
Expandable data cache
- Patent number 9,063,862
- Issue date Jun 23, 2015
- SanDisk Technologies Inc.
- William Wu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method for minimizing write amplification while maintain...
- Patent number 8,848,445
- Issue date Sep 30, 2014
- SanDisk Technologies Inc.
- Steven T. Sprouse
- G11 - INFORMATION STORAGE
Information Patent Grant
Nonvolatile memory with write cache having flush/eviction methods
- Patent number 8,700,840
- Issue date Apr 15, 2014
- SanDisk Technologies, Inc
- Alexander Paley
- G11 - INFORMATION STORAGE
Information Patent Grant
Pre-emptive garbage collection of memory blocks
- Patent number 8,626,986
- Issue date Jan 7, 2014
- SanDisk Technologies Inc.
- William Wu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Non-volatile memory and method with write cache partition managemen...
- Patent number 8,244,960
- Issue date Aug 14, 2012
- SanDisk Technologies Inc.
- Alexander Paley
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Non-volatile memory and method with write cache partitioning
- Patent number 8,094,500
- Issue date Jan 10, 2012
- SanDisk Technologies Inc.
- Alexander Paley
- G11 - INFORMATION STORAGE
Information Patent Grant
Mechanism for efficiently processing deferred order-dependent memor...
- Patent number RE40921
- Issue date Sep 22, 2009
- Intel Corporation
- William S. Wu
- 710 - Electrical computers and digital data processing systems: input/output
Information Patent Grant
On-chip switch fabric
- Patent number 7,039,750
- Issue date May 2, 2006
- PLX Technology, Inc.
- Jack Regula
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Transmission of signals synchronous to a common clock and transmiss...
- Patent number 6,598,103
- Issue date Jul 22, 2003
- Intel Corporation
- Peter D. MacWilliams
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
High-throughput interface between a system memory controller and a...
- Patent number 6,434,692
- Issue date Aug 13, 2002
- Intel Corporation
- Norman J. Rasmussen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for transferring data in source-synchronous pr...
- Patent number 6,336,159
- Issue date Jan 1, 2002
- Intel Corporation
- Peter D. MacWilliams
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
High-throughput interface between a system memory controller and a...
- Patent number 6,266,719
- Issue date Jul 24, 2001
- Intel Corporation
- Norman J. Rasmussen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Mechanism for delivering interrupt messages
- Patent number 6,263,397
- Issue date Jul 17, 2001
- Intel Corporation
- William S. Wu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
High-throughput interface between a system memory controller and a...
- Patent number 6,167,468
- Issue date Dec 26, 2000
- Intel Corporation
- Norman J. Rasmussen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for sharing a signal line between agents
- Patent number 6,112,016
- Issue date Aug 29, 2000
- Intel Corporation
- Peter D. MacWilliams
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Symmetric multiprocessing system with unified environment and distr...
- Patent number 6,047,355
- Issue date Apr 4, 2000
- Intel Corporation
- William S. Wu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for fault on use data error handling
- Patent number 6,035,436
- Issue date Mar 7, 2000
- Intel Corporation
- William S. Wu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for performing bus operations in a computer sy...
- Patent number 6,012,118
- Issue date Jan 4, 2000
- Intel Corporation
- Muthurajan Jayakumar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
High-throughput interface between a system memory controller and a...
- Patent number 6,006,291
- Issue date Dec 21, 1999
- Intel Corporation
- Norman J. Rasmussen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Mechanism for data strobe pre-driving during master changeover on a...
- Patent number 5,964,856
- Issue date Oct 12, 1999
- Intel Corporation
- William S. Wu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Mechanism for efficiently processing deferred order-dependent memor...
- Patent number 5,961,621
- Issue date Oct 5, 1999
- Intel Corporation
- William S. Wu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for tracking bus transactions
- Patent number 5,951,663
- Issue date Sep 14, 1999
- Intel Corporation
- Muthurajan Jayakumar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for switching between source-synchronous and c...
- Patent number 5,919,254
- Issue date Jul 6, 1999
- Intel Corporation
- Stephen S. Pawlowski
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for performing TLB shutdown operations in a mu...
- Patent number 5,906,001
- Issue date May 18, 1999
- Intel Corporation
- William S. Wu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Mechanism for delivering interrupt messages
- Patent number 5,848,279
- Issue date Dec 8, 1998
- Intel Corporation
- William S. Wu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparartus for sharing a signal line between agents
- Patent number 5,822,767
- Issue date Oct 13, 1998
- Intel Corporation
- Peter D. MacWilliams
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
DEFECTIVE BLOCK MANAGEMENT
- Publication number 20140321202
- Publication date Oct 30, 2014
- SanDisk Technologies, Inc.
- Nian Niles Yang
- G11 - INFORMATION STORAGE
Information Patent Application
METHOD AND SYSTEM FOR RAM CACHE COALESCING
- Publication number 20140281132
- Publication date Sep 18, 2014
- Marielle Bundukin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEM AND METHOD FOR MINIMIZING WRITE AMPLIFICATION WHILE MAINTAIN...
- Publication number 20120320679
- Publication date Dec 20, 2012
- Steven T. Sprouse
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Non-Volatile Memory and Method with Small Logical Groups Distribute...
- Publication number 20120297121
- Publication date Nov 22, 2012
- Sergey Anatolievich Gorobets
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Non-Volatile Memory and Method Having Block Management with Hot/Col...
- Publication number 20120297122
- Publication date Nov 22, 2012
- Sergey Anatolievich Gorobets
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
EXPANDABLE DATA CACHE
- Publication number 20120297140
- Publication date Nov 22, 2012
- William Wu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
FAST TRANSLATION INDICATOR TO REDUCE SECONDARY ADDRESS TABLE CHECKS...
- Publication number 20120297118
- Publication date Nov 22, 2012
- Sergey Anatolievich Gorobets
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Pre-Emptive Garbage Collection of Memory Blocks
- Publication number 20120005405
- Publication date Jan 5, 2012
- William Wu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND SYSTEM FOR BINARY CACHE CLEANUP
- Publication number 20110296122
- Publication date Dec 1, 2011
- William WU
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Maintaining Updates of Multi-Level Non-Volatile Memory in Binary No...
- Publication number 20110153912
- Publication date Jun 23, 2011
- Sergey Anatolievich Gorobets
- G11 - INFORMATION STORAGE
Information Patent Application
Non-Volatile Memory and Method With Write Cache Partition Managemen...
- Publication number 20100174847
- Publication date Jul 8, 2010
- Alexander Paley
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Non-Volatile Memory and Method With Write Cache Partitioning
- Publication number 20100172180
- Publication date Jul 8, 2010
- Alexander Paley
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Nonvolatile Memory With Write Cache Having Flush/Eviction Methods
- Publication number 20100174846
- Publication date Jul 8, 2010
- Alexander Paley
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Transmission of signals synchronous to a common clock and transmiss...
- Publication number 20020065967
- Publication date May 30, 2002
- Peter D. MacWilliams
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
High-throughput interface between a system memory controller and a...
- Publication number 20010007999
- Publication date Jul 12, 2001
- Norman J. Rasmussen
- G06 - COMPUTING CALCULATING COUNTING

William S. Wu

Person

Patents Grantslast 30 patents

Method and system for binary cache cleanup

Non-volatile memory and method having block management with hot/col...

Fast translation indicator to reduce secondary address table checks...

Defective block management

Expandable data cache

System and method for minimizing write amplification while maintain...

Nonvolatile memory with write cache having flush/eviction methods

Pre-emptive garbage collection of memory blocks

Non-volatile memory and method with write cache partition managemen...

Non-volatile memory and method with write cache partitioning

Mechanism for efficiently processing deferred order-dependent memor...

On-chip switch fabric

Transmission of signals synchronous to a common clock and transmiss...

High-throughput interface between a system memory controller and a...

Method and apparatus for transferring data in source-synchronous pr...

High-throughput interface between a system memory controller and a...

Mechanism for delivering interrupt messages

High-throughput interface between a system memory controller and a...

Method and apparatus for sharing a signal line between agents

Symmetric multiprocessing system with unified environment and distr...

Method and apparatus for fault on use data error handling

Method and apparatus for performing bus operations in a computer sy...

High-throughput interface between a system memory controller and a...

Mechanism for data strobe pre-driving during master changeover on a...

Mechanism for efficiently processing deferred order-dependent memor...

Method and apparatus for tracking bus transactions

Method and apparatus for switching between source-synchronous and c...

Method and apparatus for performing TLB shutdown operations in a mu...

Mechanism for delivering interrupt messages

Method and apparartus for sharing a signal line between agents

Patents Applicationslast 30 patents

DEFECTIVE BLOCK MANAGEMENT

METHOD AND SYSTEM FOR RAM CACHE COALESCING

SYSTEM AND METHOD FOR MINIMIZING WRITE AMPLIFICATION WHILE MAINTAIN...

Non-Volatile Memory and Method with Small Logical Groups Distribute...

Non-Volatile Memory and Method Having Block Management with Hot/Col...

EXPANDABLE DATA CACHE

FAST TRANSLATION INDICATOR TO REDUCE SECONDARY ADDRESS TABLE CHECKS...

Pre-Emptive Garbage Collection of Memory Blocks

METHOD AND SYSTEM FOR BINARY CACHE CLEANUP

Maintaining Updates of Multi-Level Non-Volatile Memory in Binary No...

Non-Volatile Memory and Method With Write Cache Partition Managemen...

Non-Volatile Memory and Method With Write Cache Partitioning

Nonvolatile Memory With Write Cache Having Flush/Eviction Methods

Transmission of signals synchronous to a common clock and transmiss...

High-throughput interface between a system memory controller and a...