Wing-Shek Wong

Person

Austin, TX, US

People

Patents Grantslast 30 patents

Information Patent Grant
Methods, systems, and apparatuses to optimize partial flag updating...
- Patent number 12,039,329
- Issue date Jul 16, 2024
- Intel Corporation
- Wing Shek Wong
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Instruction and logic for a matrix scheduler
- Patent number 9,851,976
- Issue date Dec 26, 2017
- Intel Corporation
- Wing Shek Wong
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Power logic for memory address conversion
- Patent number 9,330,022
- Issue date May 3, 2016
- Intel Corporation
- James E Phillips
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multiple texture compositing
- Patent number 9,064,336
- Issue date Jun 23, 2015
- Intel Corporation
- Kam Leung
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Loading test data into execution units in a graphics card to test e...
- Patent number 7,802,146
- Issue date Sep 21, 2010
- Intel Corporation
- Allan Wong
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Fast flag generation
- Patent number 7,783,692
- Issue date Aug 24, 2010
- Advanced Micro Devices, Inc.
- Wing-Shek Wong
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Fast hardware divider
- Patent number 7,584,237
- Issue date Sep 1, 2009
- Advanced Micro Devices, Inc.
- Teik-Chung Tan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multiple texture compositing
- Patent number 7,280,113
- Issue date Oct 9, 2007
- Intel Corporation
- Kam Leung
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multiple texture compositing
- Patent number 6,731,297
- Issue date May 4, 2004
- Intel Corporation
- Kam Leung
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for implementing 4:2:0 to 4:2:2 and 4:2:2 to 4...
- Patent number 6,674,479
- Issue date Jan 6, 2004
- Intel Corporation
- Val Cook
- H04 - ELECTRIC COMMUNICATION TECHNIQUE

Patents Applicationslast 30 patents

Information Patent Application
SUPPORT FOR LESS THAN 512-BIT OPERAND PROCESSING
- Publication number 20250004764
- Publication date Jan 2, 2025
- Intel Corporation
- Michael ESPIG
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
VECTOR PACKED MATRIX MULTIPLICATION AND ACCUMULATION PROCESSORS, ME...
- Publication number 20250004768
- Publication date Jan 2, 2025
- Alexander HEINECKE
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROCESSOR CIRCUITRY TO PERFORM A FUSED MULTIPLY-ADD
- Publication number 20240354057
- Publication date Oct 24, 2024
- Intel Corporation
- Jongwook Sohn
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ACCELERATING KECCAK ALGORITHMS
- Publication number 20240211253
- Publication date Jun 27, 2024
- Intel Corporation
- Santosh Ghosh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CONVERSION INSTRUCTIONS
- Publication number 20230205522
- Publication date Jun 29, 2023
- Intel Corporation
- Robert VALENTINE
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CONVERSION INSTRUCTIONS
- Publication number 20230205521
- Publication date Jun 29, 2023
- Intel Corporation
- Robert VALENTINE
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CONVERSION INSTRUCTIONS
- Publication number 20230205527
- Publication date Jun 29, 2023
- Intel Corporation
- Robert VALENTINE
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHODS, SYSTEMS, AND APPARATUSES TO OPTIMIZE PARTIAL FLAG UPDATING...
- Publication number 20220206792
- Publication date Jun 30, 2022
- Intel Corporation
- WING SHEK WONG
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHODS, SYSTEMS, AND APPARATUSES FOR A SCALABLE RESERVATION STATIO...
- Publication number 20220206793
- Publication date Jun 30, 2022
- Intel Corporation
- WING SHEK WONG
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHODS, SYSTEMS, AND APPARATUSES TO OPTIMIZE CROSS-LANE PACKED DAT...
- Publication number 20220206791
- Publication date Jun 30, 2022
- Intel Corporation
- Wing Shek Wong
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INSTRUCTION AND LOGIC FOR A MATRIX SCHEDULER
- Publication number 20160179552
- Publication date Jun 23, 2016
- Wing Shek Wong
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Power Logic For Memory Address Conversion
- Publication number 20140380018
- Publication date Dec 25, 2014
- James E. Phillips
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LOADING TEST DATA INTO EXECUTION UNITS IN A GRAPHICS CARD TO TEST T...
- Publication number 20080307202
- Publication date Dec 11, 2008
- Allan WONG
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Multiple texture compositing
- Publication number 20070291045
- Publication date Dec 20, 2007
- Kam Leung
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Address generation unit with operand recycling
- Publication number 20070011432
- Publication date Jan 11, 2007
- Advanced Micro Devices, Inc.
- Michael E. Tuuk
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and apparatus for implementing 4:2:0 to 4:2:2 and 4:2:2 to 4...
- Publication number 20040119886
- Publication date Jun 24, 2004
- Intel Corporation
- Val Cook
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Method and apparatus for implementing 4:2:0 to 4:2:2 and 4:2:2 to 4...
- Publication number 20020101536
- Publication date Aug 1, 2002
- Vail G. Cook
- H04 - ELECTRIC COMMUNICATION TECHNIQUE

Wing-Shek Wong

Person

Patents Grantslast 30 patents

Methods, systems, and apparatuses to optimize partial flag updating...

Instruction and logic for a matrix scheduler

Power logic for memory address conversion

Multiple texture compositing

Loading test data into execution units in a graphics card to test e...

Fast flag generation

Fast hardware divider

Multiple texture compositing

Multiple texture compositing

Method and apparatus for implementing 4:2:0 to 4:2:2 and 4:2:2 to 4...

Patents Applicationslast 30 patents

SUPPORT FOR LESS THAN 512-BIT OPERAND PROCESSING

VECTOR PACKED MATRIX MULTIPLICATION AND ACCUMULATION PROCESSORS, ME...

PROCESSOR CIRCUITRY TO PERFORM A FUSED MULTIPLY-ADD

ACCELERATING KECCAK ALGORITHMS

CONVERSION INSTRUCTIONS

CONVERSION INSTRUCTIONS

CONVERSION INSTRUCTIONS

METHODS, SYSTEMS, AND APPARATUSES TO OPTIMIZE PARTIAL FLAG UPDATING...

METHODS, SYSTEMS, AND APPARATUSES FOR A SCALABLE RESERVATION STATIO...

METHODS, SYSTEMS, AND APPARATUSES TO OPTIMIZE CROSS-LANE PACKED DAT...

INSTRUCTION AND LOGIC FOR A MATRIX SCHEDULER

Power Logic For Memory Address Conversion

LOADING TEST DATA INTO EXECUTION UNITS IN A GRAPHICS CARD TO TEST T...

Multiple texture compositing

Address generation unit with operand recycling

Method and apparatus for implementing 4:2:0 to 4:2:2 and 4:2:2 to 4...

Method and apparatus for implementing 4:2:0 to 4:2:2 and 4:2:2 to 4...