XIAN J. NING

Person

Shanghai, CN

People

Patents Grantslast 30 patents

Information Patent Grant
Bond pad for low K dielectric materials and method for manufacture...
- Patent number 8,395,240
- Issue date Mar 12, 2013
- Semiconductor Manufacturing International (Shanghai) Corporation
- Xian J. Ning
- Y10 - TECHNICAL SUBJECTS COVERED BY FORMER USPC
Information Patent Grant
Method for circuit layout and rapid thermal annealing method for se...
- Patent number 8,392,863
- Issue date Mar 5, 2013
- Semiconductor Manufacturing International (Shanghai) Corporation
- Jianhua Ju
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method of forming a via structure dual damascene structure for the...
- Patent number 8,158,520
- Issue date Apr 17, 2012
- Semiconductor Manufacturing International (Shanghai) Corporation
- Xian J. Ning
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method and structure using a pure silicon dioxide hardmask for gate...
- Patent number 8,106,423
- Issue date Jan 31, 2012
- Semiconductor Manufacturing International (Shanghai) Corporation
- Hanming Wu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integration scheme for strained source/drain CMOS using oxide hard...
- Patent number 8,058,120
- Issue date Nov 15, 2011
- Semiconductor Manufacturing International (Shanghai) Corporation
- Xian Jie Ning
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Bond pad for low K dielectric materials and method for manufacture...
- Patent number 8,049,308
- Issue date Nov 1, 2011
- Semiconductor Manufacturing International (Shanghai) Corporation
- Xian J. Ning
- Y10 - TECHNICAL SUBJECTS COVERED BY FORMER USPC
Information Patent Grant
Single mask scheme method and structure for integrating PMOS and NM...
- Patent number 7,820,500
- Issue date Oct 26, 2010
- Semiconductor Manufacturing International (Shanghai) Corporation
- Xian J. Ning
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Metal hard mask method and structure for strained silicon MOS trans...
- Patent number 7,709,336
- Issue date May 4, 2010
- Semiconductor Manufacturing International (Shanghai) Corporation
- Xian J. Ning
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Seal ring corner design
- Patent number 7,663,159
- Issue date Feb 16, 2010
- Semiconductor Manufacturing International (Shanghai) Corporation
- Xian J. Ning
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Dummy patterns and method of manufacture for mechanical strength of...
- Patent number 7,605,470
- Issue date Oct 20, 2009
- Semiconductor Manufacturing International (Shanghai) Corporation
- Xian J. Ning
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method and structure for second spacer formation for strained silic...
- Patent number 7,591,659
- Issue date Sep 22, 2009
- Semiconductor Manufacturing International (Shanghai) Corporation
- John Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integration scheme method and structure for transistors using strai...
- Patent number 7,547,595
- Issue date Jun 16, 2009
- Semiconductor Manufacturing International (Shanghai) Corporation
- Xian J. Ning
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Seal ring structures with unlanded via stacks
- Patent number 7,479,699
- Issue date Jan 20, 2009
- Semiconductor Manufacturing International (Shanghai) Corporation
- Xian J. Ning
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method and structure using a pure silicon dioxide hardmask for gate...
- Patent number 7,425,488
- Issue date Sep 16, 2008
- Semiconductor Manufacturing International (Shanghai)
- Hanming Wu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Polysilicon gate doping method and structure for strained silicon M...
- Patent number 7,335,566
- Issue date Feb 26, 2008
- Semiconductor Manufacturing International (Shanghai) Corporation
- Xian J. Ning
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Magnetic random access memory and method of fabricating thereof
- Patent number 7,183,130
- Issue date Feb 27, 2007
- International Business Machines Corporation
- Joachim Nuetzel
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and structure of manufacturing high capacitance metal on ins...
- Patent number 7,015,110
- Issue date Mar 21, 2006
- Semiconductor Manufacturing International (Shanghai) Corporation
- Xian Jie Ning
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for fabricating copper damascene structures in porous dielec...
- Patent number 6,972,251
- Issue date Dec 6, 2005
- Semiconductor Manufactoring International (Shanghai) Corporation
- Xian Jie Ning
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Maskless array protection process flow for forming interconnect via...
- Patent number 6,784,091
- Issue date Aug 31, 2004
- International Business Machines Corporation
- Joachim Nuetzel
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
BOND PAD FOR LOW K DIELECTRIC MATERIALS AND METHOD FOR MANUFACTURE...
- Publication number 20120034771
- Publication date Feb 9, 2012
- Semiconductor Manufacturing International (Shanghai) Corporation
- XIAN J. NING
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Design Method for Circuit Layout and Rapid Thermal Annealing Method...
- Publication number 20110078647
- Publication date Mar 31, 2011
- Semiconductor Manufacturing International (Shanghai) Corporation
- Jianhua Ju
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INTEGRATION SCHEME FOR STRAINED SOURCE/DRAIN CMOS USING OXIDE HARD...
- Publication number 20110070701
- Publication date Mar 24, 2011
- Semiconductor Manufacturing International (Shanghai) Corporation
- Xian Jie Ning
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method and structure using a pure silicon dioxide hardmask for gate...
- Publication number 20090065805
- Publication date Mar 12, 2009
- Semiconductor Manufacturing International (Shanghai) Corporation
- Hanming Wu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DUMMY PATTERNS AND METHOD OF MANUFACTURE FOR MECHANICAL STRENGTH OF...
- Publication number 20080142975
- Publication date Jun 19, 2008
- Semiconductor Manufacturing International (Shanghai) Corporation
- XIAN J. NING
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Poly Silicon Gate Doping Method and Structure for Strained Silicon...
- Publication number 20070184668
- Publication date Aug 9, 2007
- Semiconductor Manufacturing International (Shanghai) Corporation
- Xian J. Ning
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEAL RING STRUCTURES WITH UNLANDED VIA STACKS
- Publication number 20070145567
- Publication date Jun 28, 2007
- Semiconductor Manufacturing International (Shanghai) Corporation
- XIAN J. NING
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Bond pad for low K dielectric materials and method for manufacture...
- Publication number 20070122597
- Publication date May 31, 2007
- Semiconductor Manufacturing International (Shanghai) Corporation
- Xian J. Ning
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Integration scheme method and structure for transistors using strai...
- Publication number 20070099369
- Publication date May 3, 2007
- Semiconductor Manufacturing International (Shanghai) Corporation
- Xian J. Ning
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Single mask scheme method and structure for integrating PMOS and NM...
- Publication number 20070096201
- Publication date May 3, 2007
- Semiconductor Manufacturing International (Shanghai) Corporation
- Xian J. Ning
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method and structure for second spacer formation for strained silic...
- Publication number 20070077716
- Publication date Apr 5, 2007
- Semiconductor Manufacturing International (Shanghai) Corporation
- John Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Seal ring corner design
- Publication number 20070069336
- Publication date Mar 29, 2007
- Semiconductor Manufacturing Int'l (Shanghai) Corporation
- Xian J. Ning
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method and structure using a pure silicon dioxide hardmask for gate...
- Publication number 20070063221
- Publication date Mar 22, 2007
- Semiconductor Manufacturing Int'l (Shanghai) Corporation
- Hanming Wu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Metal hard mask method and structure for strained silicon MOS trans...
- Publication number 20060194395
- Publication date Aug 31, 2006
- Semiconductor Manufacturing International (Shanghai) Corporation
- Xian J. Ning
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method and structure for reducing contact resistance in dual damasc...
- Publication number 20060060971
- Publication date Mar 23, 2006
- Semiconductor Manufacturing International (Shanghai) Corporation
- Xian J. Ning
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method and structure of manufacturing high capacitance metal on ins...
- Publication number 20050140010
- Publication date Jun 30, 2005
- Semiconductor Manufacturing International (Shanghai) Corporation
- Xian Jie Ning
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MAGNETIC RANDOM ACCESS MEMORY AND METHOD OF FABRICATING THEREOF
- Publication number 20050023581
- Publication date Feb 3, 2005
- International Business Machines Corporation
- Joachim Nuetzel
- G11 - INFORMATION STORAGE
Information Patent Application
Method for fabricating copper damascene structures in porous dielec...
- Publication number 20040126997
- Publication date Jul 1, 2004
- Semiconductor Manufacturing International (Shanghai) LTD, Co.
- Xian Jie Ning
- H01 - BASIC ELECTRIC ELEMENTS

XIAN J. NING

Person

Patents Grantslast 30 patents

Bond pad for low K dielectric materials and method for manufacture...

Method for circuit layout and rapid thermal annealing method for se...

Method of forming a via structure dual damascene structure for the...

Method and structure using a pure silicon dioxide hardmask for gate...

Integration scheme for strained source/drain CMOS using oxide hard...

Bond pad for low K dielectric materials and method for manufacture...

Single mask scheme method and structure for integrating PMOS and NM...

Metal hard mask method and structure for strained silicon MOS trans...

Seal ring corner design

Dummy patterns and method of manufacture for mechanical strength of...

Method and structure for second spacer formation for strained silic...

Integration scheme method and structure for transistors using strai...

Seal ring structures with unlanded via stacks

Method and structure using a pure silicon dioxide hardmask for gate...

Polysilicon gate doping method and structure for strained silicon M...

Magnetic random access memory and method of fabricating thereof

Method and structure of manufacturing high capacitance metal on ins...

Method for fabricating copper damascene structures in porous dielec...

Maskless array protection process flow for forming interconnect via...

Patents Applicationslast 30 patents

BOND PAD FOR LOW K DIELECTRIC MATERIALS AND METHOD FOR MANUFACTURE...

Design Method for Circuit Layout and Rapid Thermal Annealing Method...

INTEGRATION SCHEME FOR STRAINED SOURCE/DRAIN CMOS USING OXIDE HARD...

Method and structure using a pure silicon dioxide hardmask for gate...

DUMMY PATTERNS AND METHOD OF MANUFACTURE FOR MECHANICAL STRENGTH OF...

Poly Silicon Gate Doping Method and Structure for Strained Silicon...

SEAL RING STRUCTURES WITH UNLANDED VIA STACKS

Bond pad for low K dielectric materials and method for manufacture...

Integration scheme method and structure for transistors using strai...

Single mask scheme method and structure for integrating PMOS and NM...

Method and structure for second spacer formation for strained silic...

Seal ring corner design

Method and structure using a pure silicon dioxide hardmask for gate...

Metal hard mask method and structure for strained silicon MOS trans...

Method and structure for reducing contact resistance in dual damasc...

Method and structure of manufacturing high capacitance metal on ins...

MAGNETIC RANDOM ACCESS MEMORY AND METHOD OF FABRICATING THEREOF

Method for fabricating copper damascene structures in porous dielec...