Xiaoying GUO

Person

Phoenix, AZ, US

People

Patents Grantslast 30 patents

Information Patent Grant
Coreless architecture and processing strategy for EMIB-based substr...
- Patent number 12,142,567
- Issue date Nov 12, 2024
- Intel Corporation
- Xiao Di Sun Zhou
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Chiplet first architecture for die tiling applications
- Patent number 11,990,427
- Issue date May 21, 2024
- Intel Corporation
- Srinivas Pietambaram
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Chiplet first architecture for die tiling applications
- Patent number 11,973,041
- Issue date Apr 30, 2024
- Intel Corporation
- Srinivas Pietambaram
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Architecture to manage FLI bump height delta and reliability needs...
- Patent number 11,955,448
- Issue date Apr 9, 2024
- Intel Corporation
- Jung Kyu Han
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Etch barrier for microelectronic packaging conductive structures
- Patent number 11,948,898
- Issue date Apr 2, 2024
- Intel Corporation
- Kristof Darmawikarta
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Microelectronic assemblies having conductive structures with differ...
- Patent number 11,942,334
- Issue date Mar 26, 2024
- Intel Corporation
- Jeremy Ecton
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Chiplet first architecture for die tiling applications
- Patent number 11,769,735
- Issue date Sep 26, 2023
- Intel Corporation
- Srinivas Pietambaram
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
In-situ component fabrication of a highly efficient, high inductanc...
- Patent number 11,404,389
- Issue date Aug 2, 2022
- Intel Corporation
- Jeremy Ecton
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
First layer interconnect first on carrier approach for EMIB patch
- Patent number 11,088,103
- Issue date Aug 10, 2021
- Intel Corporation
- Changhua Liu
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
MICROELECTRONIC ASSEMBLIES INCLUDING A PHOTOIMAGEABLE DIELECTRIC FO...
- Publication number 20250006645
- Publication date Jan 2, 2025
- Intel Corporation
- Xiao Liu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
2D FILLERS FOR REDUCED CTE FOR PID
- Publication number 20240332125
- Publication date Oct 3, 2024
- Intel Corporation
- Kyle ARRINGTON
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHODS, SYSTEMS, APPARATUS, AND ARTICLES OF MANUFACTURE TO IMPROVE...
- Publication number 20240312865
- Publication date Sep 19, 2024
- Intel Corporation
- Kyle Arrington
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CHIPLET FIRST ARCHITECTURE FOR DIE TILING APPLICATIONS
- Publication number 20240250043
- Publication date Jul 25, 2024
- Intel Corporation
- Srinivas PIETAMBARAM
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
OPTICAL SEMICONDUCTOR PACKAGE AND METHOD
- Publication number 20240219655
- Publication date Jul 4, 2024
- Intel Corporation
- Haobo Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
OPTICAL SEMICONDUCTOR PACKAGE AND METHOD
- Publication number 20240219660
- Publication date Jul 4, 2024
- Intel Corporation
- Bohan Shan
- G02 - OPTICS
Information Patent Application
DIE ATTACH IN GLASS CORE PACKAGE THROUGH ORGANIC-TO-ORGANIC BONDING
- Publication number 20240222345
- Publication date Jul 4, 2024
- Intel Corporation
- Bohan Shan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
APPARATUS AND METHOD FOR ATTACHING AN OPTICAL COMPONENT USING HYBRI...
- Publication number 20240222243
- Publication date Jul 4, 2024
- Intel Corporation
- Bohan Shan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHODS, SYSTEMS, APPARATUS, AND ARTICLES OF MANUFACTURE TO PRODUCE...
- Publication number 20240222259
- Publication date Jul 4, 2024
- Intel Corporation
- Haobo Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHODS AND APPARATUS FOR OPTICAL THERMAL TREATMENT IN SEMICONDUCTO...
- Publication number 20240222301
- Publication date Jul 4, 2024
- Intel Corporation
- Bohan Shan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHODS AND APPARATUS TO REDUCE SOLDER BUMP BRIDGING BETWEEN TWO SU...
- Publication number 20240222304
- Publication date Jul 4, 2024
- Intel Corporation
- Bohan Shan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
ELECTRICAL LAYER WITH ROUGHENED SURFACES
- Publication number 20240222136
- Publication date Jul 4, 2024
- Intel Corporation
- Bohan Shan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
GLASS SUBSTRATE DEVICE WITH PLATED THROUGH HOLES
- Publication number 20240222257
- Publication date Jul 4, 2024
- Intel Corporation
- Bohan Shan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHODS AND APPARATUS TO PREVENT OVER-ETCH IN SEMICONDUCTOR PACKAGES
- Publication number 20240222283
- Publication date Jul 4, 2024
- Intel Corporation
- Hongxia Feng
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
GLASS SUBSTRATE FABRICATION USING HYBRID BONDING
- Publication number 20240222210
- Publication date Jul 4, 2024
- Intel Corporation
- Bohan Shan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
APPARATUS AND METHOD FOR ATTACHING AN OPTICAL COMPONENT USING NO RE...
- Publication number 20240222238
- Publication date Jul 4, 2024
- Intel Corporation
- Bohan Shan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
GLASS SUBSTRATE DEVICE WITH EMBEDDED COMPONENTS
- Publication number 20240213170
- Publication date Jun 27, 2024
- Intel Corporation
- Bohan Shan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
GLASS SUBSTRATE DEVICE WITH THROUGH GLASS CAVITY
- Publication number 20240215269
- Publication date Jun 27, 2024
- Intel Corporation
- Bohan Shan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHODS, SYSTEMS, APPARATUS, AND ARTICLES OF MANUFACTURE TO COOL IN...
- Publication number 20240213116
- Publication date Jun 27, 2024
- Intel Corporation
- Kyle Arrington
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
LOW DIE HEIGHT GLASS SUBSTRATE DEVICE AND METHOD
- Publication number 20240213169
- Publication date Jun 27, 2024
- Intel Corporation
- Bohan Shan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
GLASS LAYER WITH LITHO DEFINED THROUGH-GLASS VIA
- Publication number 20240203806
- Publication date Jun 20, 2024
- Intel Corporation
- Bohan Shan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DRY FILM PHOTORESIST WET LAMINATION AND METHOD
- Publication number 20240203853
- Publication date Jun 20, 2024
- Intel Corporation
- Bohan Shan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT PACKAGE ARCHITECTURES WITH CORE AND/OR BUILD-UP...
- Publication number 20240186228
- Publication date Jun 6, 2024
- Intel Corporation
- Haobo Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT PACKAGE ARCHITECTURES WITH CORE AND/OR BUILD-UP...
- Publication number 20240186227
- Publication date Jun 6, 2024
- Intel Corporation
- Haobo Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SINGULATION OF INTEGRATED CIRCUIT PACKAGE SUBSTRATES WITH GLASS CORES
- Publication number 20240112971
- Publication date Apr 4, 2024
- Intel Corporation
- Yiqun Bai
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
ELECTROLYTIC SURFACE FINISH ARCHITECTURE
- Publication number 20240105575
- Publication date Mar 28, 2024
- Intel Corporation
- Jason M. GAMBA
- C25 - ELECTROLYTIC OR ELECTROPHORETIC PROCESSES APPARATUS THEREFOR
Information Patent Application
DFR OVERHANG PROCESS FLOW FOR ELECTROLYTIC SURFACE FINISH FOR GLASS...
- Publication number 20240105576
- Publication date Mar 28, 2024
- Intel Corporation
- Kyle MCELHINNY
- C25 - ELECTROLYTIC OR ELECTROPHORETIC PROCESSES APPARATUS THEREFOR
Information Patent Application
THROUGH GLASS VIAS (TGVS) IN GLASS CORE SUBSTRATES
- Publication number 20240071848
- Publication date Feb 29, 2024
- Intel Corporation
- Bohan SHAN
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SUBSTRATES HAVING ADHESION PROMOTOR LAYERS AND RELATED METHODS
- Publication number 20240006285
- Publication date Jan 4, 2024
- The Intel Corporation
- Yi Yang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
ELECTRICAL TRACES ON GLASS CORES IN INTEGRATED CIRCUIT PACKAGES AND...
- Publication number 20230197540
- Publication date Jun 22, 2023
- Intel Corporation
- Kristof Darmawikarta
- H01 - BASIC ELECTRIC ELEMENTS

Xiaoying GUO

Person

Patents Grantslast 30 patents

Coreless architecture and processing strategy for EMIB-based substr...

Chiplet first architecture for die tiling applications

Chiplet first architecture for die tiling applications

Architecture to manage FLI bump height delta and reliability needs...

Etch barrier for microelectronic packaging conductive structures

Microelectronic assemblies having conductive structures with differ...

Chiplet first architecture for die tiling applications

In-situ component fabrication of a highly efficient, high inductanc...

First layer interconnect first on carrier approach for EMIB patch

Patents Applicationslast 30 patents

MICROELECTRONIC ASSEMBLIES INCLUDING A PHOTOIMAGEABLE DIELECTRIC FO...

2D FILLERS FOR REDUCED CTE FOR PID

METHODS, SYSTEMS, APPARATUS, AND ARTICLES OF MANUFACTURE TO IMPROVE...

CHIPLET FIRST ARCHITECTURE FOR DIE TILING APPLICATIONS

OPTICAL SEMICONDUCTOR PACKAGE AND METHOD

OPTICAL SEMICONDUCTOR PACKAGE AND METHOD

DIE ATTACH IN GLASS CORE PACKAGE THROUGH ORGANIC-TO-ORGANIC BONDING

APPARATUS AND METHOD FOR ATTACHING AN OPTICAL COMPONENT USING HYBRI...

METHODS, SYSTEMS, APPARATUS, AND ARTICLES OF MANUFACTURE TO PRODUCE...

METHODS AND APPARATUS FOR OPTICAL THERMAL TREATMENT IN SEMICONDUCTO...

METHODS AND APPARATUS TO REDUCE SOLDER BUMP BRIDGING BETWEEN TWO SU...

ELECTRICAL LAYER WITH ROUGHENED SURFACES

GLASS SUBSTRATE DEVICE WITH PLATED THROUGH HOLES

METHODS AND APPARATUS TO PREVENT OVER-ETCH IN SEMICONDUCTOR PACKAGES

GLASS SUBSTRATE FABRICATION USING HYBRID BONDING

APPARATUS AND METHOD FOR ATTACHING AN OPTICAL COMPONENT USING NO RE...

GLASS SUBSTRATE DEVICE WITH EMBEDDED COMPONENTS

GLASS SUBSTRATE DEVICE WITH THROUGH GLASS CAVITY

METHODS, SYSTEMS, APPARATUS, AND ARTICLES OF MANUFACTURE TO COOL IN...

LOW DIE HEIGHT GLASS SUBSTRATE DEVICE AND METHOD

GLASS LAYER WITH LITHO DEFINED THROUGH-GLASS VIA

DRY FILM PHOTORESIST WET LAMINATION AND METHOD

INTEGRATED CIRCUIT PACKAGE ARCHITECTURES WITH CORE AND/OR BUILD-UP...

INTEGRATED CIRCUIT PACKAGE ARCHITECTURES WITH CORE AND/OR BUILD-UP...

SINGULATION OF INTEGRATED CIRCUIT PACKAGE SUBSTRATES WITH GLASS CORES

ELECTROLYTIC SURFACE FINISH ARCHITECTURE

DFR OVERHANG PROCESS FLOW FOR ELECTROLYTIC SURFACE FINISH FOR GLASS...

THROUGH GLASS VIAS (TGVS) IN GLASS CORE SUBSTRATES

SUBSTRATES HAVING ADHESION PROMOTOR LAYERS AND RELATED METHODS

ELECTRICAL TRACES ON GLASS CORES IN INTEGRATED CIRCUIT PACKAGES AND...