Yoav Z. Hollander

Person

Qiriat Ono, IL

People

Patents Grantslast 30 patents

Information Patent Grant
System and methods thereof for monitoring proper behavior of an aut...
- Patent number 11,999,366
- Issue date Jun 4, 2024
- FORETELLIX LTD.
- Yoav Hollander
- B60 - VEHICLES IN GENERAL
Information Patent Grant
Transaction correlation system
- Patent number 9,208,271
- Issue date Dec 8, 2015
- Cadence Design Systems, Inc.
- Reshef Meir
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systems and methods for automatically generating executable system...
- Patent number 8,560,893
- Issue date Oct 15, 2013
- Cadence Design Systems, Inc.
- Yoav Hollander
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Automatic debug apparatus and method for automatic debug of an inte...
- Patent number 8,302,050
- Issue date Oct 30, 2012
- Cadence Design Systems, Inc.
- Yoav Hollander
- G01 - MEASURING TESTING
Information Patent Grant
Method and system for automatically creating tests
- Patent number 7,665,067
- Issue date Feb 16, 2010
- Cadence Design (Israel) II Ltd.
- Yoav Hollander
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for functionally verifying a physical device u...
- Patent number 7,284,177
- Issue date Oct 16, 2007
- Verisity, Ltd.
- Yoav Z. Hollander
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method for measuring temporal coverage detection
- Patent number 6,675,138
- Issue date Jan 6, 2004
- Verisity Ltd.
- Yoav Hollander
- G01 - MEASURING TESTING
Information Patent Grant
Method and apparatus for test generation during circuit design
- Patent number 6,530,054
- Issue date Mar 4, 2003
- Verisity Ltd.
- Yoav Hollander
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for test generation during circuit design
- Patent number 6,347,388
- Issue date Feb 12, 2002
- Verisity Ltd.
- Yoav Hollander
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for test generation during circuit design
- Patent number 6,182,258
- Issue date Jan 30, 2001
- Verisity Ltd.
- Yoav Hollander
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
SYSTEM AND METHODS THEREOF FOR AUTOMATED IDENTIFICATION OF OCCURREN...
- Publication number 20240199041
- Publication date Jun 20, 2024
- Foretellix Ltd.
- Yoav HOLLANDER
- B60 - VEHICLES IN GENERAL
Information Patent Application
TECHNIQUES FOR PROVIDING CONCRETE INSTANCES IN TRAFFIC SCENARIOS BY...
- Publication number 20220237343
- Publication date Jul 28, 2022
- Foretellix Ltd.
- Dmitry PIDAN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEM AND METHODS THEREOF FOR MONITORING PROPER BEHAVIOR OF AN AUT...
- Publication number 20210179124
- Publication date Jun 17, 2021
- Foretellix Ltd.
- Yoav HOLLANDER
- B60 - VEHICLES IN GENERAL
Information Patent Application
Method and apparatus for functionally verifying a physical device u...
- Publication number 20060242525
- Publication date Oct 26, 2006
- Yoav Z. Hollander
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and system for test creation
- Publication number 20050060132
- Publication date Mar 17, 2005
- Yoav Hollander
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and apparatus for test generation during circuit design
- Publication number 20020073375
- Publication date Jun 13, 2002
- Yoav Hollander
- G01 - MEASURING TESTING

Yoav Z. Hollander

Person

Patents Grantslast 30 patents

System and methods thereof for monitoring proper behavior of an aut...

Transaction correlation system

Systems and methods for automatically generating executable system...

Automatic debug apparatus and method for automatic debug of an inte...

Method and system for automatically creating tests

Method and apparatus for functionally verifying a physical device u...

System and method for measuring temporal coverage detection

Method and apparatus for test generation during circuit design

Method and apparatus for test generation during circuit design

Method and apparatus for test generation during circuit design

Patents Applicationslast 30 patents

SYSTEM AND METHODS THEREOF FOR AUTOMATED IDENTIFICATION OF OCCURREN...

TECHNIQUES FOR PROVIDING CONCRETE INSTANCES IN TRAFFIC SCENARIOS BY...

SYSTEM AND METHODS THEREOF FOR MONITORING PROPER BEHAVIOR OF AN AUT...

Method and apparatus for functionally verifying a physical device u...

Method and system for test creation

Method and apparatus for test generation during circuit design