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G11C11/418

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GPHYSICS G11Information storage G11CSTATIC STORES G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements Storage elements therefor

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G11C11/418Address circuits

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Patents Grantslast 30 patents

Information Patent Grant
SRAM repair system and method
- Patent number 12,315,586
- Issue date May 27, 2025
- Texas Instruments Incorporated
- Robin O. Hoel
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device and manufacturing thereof
- Patent number 12,317,468
- Issue date May 27, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd
- Jhon Jhy Liaw
- G11 - INFORMATION STORAGE
Information Patent Grant
Integrated circuit die with memory macro including through-silicon...
- Patent number 12,308,303
- Issue date May 20, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd
- Hidehiro Fujiwara
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Multi-port bitcell architecture
- Patent number 12,300,310
- Issue date May 13, 2025
- ARM Limited
- Vianney Antoine Choserot
- G11 - INFORMATION STORAGE
Information Patent Grant
Multipurpose wordline underdrive circuits, devices, and systems
- Patent number 12,300,311
- Issue date May 13, 2025
- Advanced Micro Devices, Inc.
- Sahilpreet Singh
- G11 - INFORMATION STORAGE
Information Patent Grant
SRAM with improved write performance and write operation method the...
- Patent number 12,260,905
- Issue date Mar 25, 2025
- UIF (University Industry Foundation), Yonsei University
- Seong Ook Jung
- G11 - INFORMATION STORAGE
Information Patent Grant
Nonvolatile SRAM
- Patent number 12,254,923
- Issue date Mar 18, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd
- Perng-Fei Yuh
- G11 - INFORMATION STORAGE
Information Patent Grant
Method for reading memory
- Patent number 12,243,586
- Issue date Mar 4, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd
- Yuhsiang Chen
- G11 - INFORMATION STORAGE
Information Patent Grant
Low-power static random access memory
- Patent number 12,237,008
- Issue date Feb 25, 2025
- UNTETHER AI CORPORATION
- Katsuyuki Sato
- G11 - INFORMATION STORAGE
Information Patent Grant
Selective bit line clamping control for an in-memory compute operat...
- Patent number 12,237,007
- Issue date Feb 25, 2025
- STMICROELECTRONICS INTERNATIONAL N.V.
- Kedar Janardan Dhori
- G11 - INFORMATION STORAGE
Information Patent Grant
Three-dimensional (3-D) write assist scheme for memory cells
- Patent number 12,237,050
- Issue date Feb 25, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd
- Chih-Chieh Chiu
- G11 - INFORMATION STORAGE
Information Patent Grant
Sense amplifier circuit, memory circuit, and sensing method thereof
- Patent number 12,237,009
- Issue date Feb 25, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd
- Jui-Jen Wu
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and apparatus for protecting a PUF generator
- Patent number 12,236,001
- Issue date Feb 25, 2025
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Shih-Lien Linus Lu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Column multiplexer circuitry
- Patent number 12,230,317
- Issue date Feb 18, 2025
- ARM Limited
- Lalit Gupta
- G11 - INFORMATION STORAGE
Information Patent Grant
Modular memory architecture with more significant bit sub-array wor...
- Patent number 12,210,754
- Issue date Jan 28, 2025
- STMICROELECTRONICS INTERNATIONAL N.V.
- Praveen Kumar Verma
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Timing control circuit of memory device with tracking word line and...
- Patent number 12,198,754
- Issue date Jan 14, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd
- Xiu-Li Yang
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device with signal edge sharpener circuitry
- Patent number 12,190,944
- Issue date Jan 7, 2025
- Taiwain Semiconductor Manufacturing Company, Ltd.
- Atul Katoch
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device
- Patent number 12,193,206
- Issue date Jan 7, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd
- Xiu-Li Yang
- G11 - INFORMATION STORAGE
Information Patent Grant
SRAM power-up random number generator
- Patent number 12,190,945
- Issue date Jan 7, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd
- Jui-Che Tsai
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Shared decoder circuit and method
- Patent number 12,183,432
- Issue date Dec 31, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd
- XiuLi Yang
- G11 - INFORMATION STORAGE
Information Patent Grant
High-speed multi-port memory supporting collision
- Patent number 12,183,393
- Issue date Dec 31, 2024
- QUALCOMM Incorporated
- Pradeep Raj
- G11 - INFORMATION STORAGE
Information Patent Grant
Adaptive body bias management for an in-memory compute operation wh...
- Patent number 12,176,025
- Issue date Dec 24, 2024
- STMICROELECTRONICS INTERNATIONAL N.V.
- Harsh Rawat
- G11 - INFORMATION STORAGE
Information Patent Grant
PUF generators based on SRAM bit cells
- Patent number 12,177,370
- Issue date Dec 24, 2024
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Cormac Michael O'Connell
- G11 - INFORMATION STORAGE
Information Patent Grant
Circuitry for power management assertion
- Patent number 12,170,108
- Issue date Dec 17, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd
- Sanjeev Kumar Jain
- G11 - INFORMATION STORAGE
Information Patent Grant
Electronic bistable circuit with third voltage to retain memory data
- Patent number 12,165,697
- Issue date Dec 10, 2024
- Japan Science and Technology Agency
- Satoshi Sugahara
- G11 - INFORMATION STORAGE
Information Patent Grant
SRAM power savings and write assist
- Patent number 12,165,700
- Issue date Dec 10, 2024
- Advanced Micro Devices, Inc.
- Russell J. Schreiber
- G11 - INFORMATION STORAGE
Information Patent Grant
SRAM with fast, controlled peak current, power efficient array rese...
- Patent number 12,159,689
- Issue date Dec 3, 2024
- STMICROELECTRONICS INTERNATIONAL N.V.
- Praveen Kumar Verma
- G11 - INFORMATION STORAGE
Information Patent Grant
Shared bit lines for memory cells
- Patent number 12,160,985
- Issue date Dec 3, 2024
- Taiwan Semiconductor Manufacturing Co., Ltd
- Ping-Wei Wang
- G11 - INFORMATION STORAGE
Information Patent Grant
Current leakage management controller for reading from memory cells
- Patent number 12,148,464
- Issue date Nov 19, 2024
- Xilinx, Inc.
- Michael Tsivyan
- G11 - INFORMATION STORAGE
Information Patent Grant
At-speed synchronous write-through operation for testing two-port m...
- Patent number 12,148,490
- Issue date Nov 19, 2024
- Synopsys, Inc.
- Harold Pilo
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
SELECTIVE BIT LINE CLAMPING CONTROL FOR AN IN-MEMORY COMPUTE OPERAT...
- Publication number 20250174269
- Publication date May 29, 2025
- STMicroelectronics International N.V.
- Kedar Janardan DHORI
- G11 - INFORMATION STORAGE
Information Patent Application
Systems, Methods, and Devices for a Wordline or a Bitline Formed an...
- Publication number 20250176152
- Publication date May 29, 2025
- Arm Limted
- Andy Wangkun Chen
- G11 - INFORMATION STORAGE
Information Patent Application
THREE-DIMENSIONAL (3-D) WRITE ASSIST SCHEME FOR MEMORY CELLS
- Publication number 20250166681
- Publication date May 22, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Chih-Chieh CHIU
- G11 - INFORMATION STORAGE
Information Patent Application
SENSE AMPLIFIER CIRCUIT, MEMORY CIRCUIT, AND SENSING METHOD THEREOF
- Publication number 20250166699
- Publication date May 22, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Jui-Jen Wu
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR MEMORY DEVICE
- Publication number 20250157532
- Publication date May 15, 2025
- SOCIONEXT INC.
- Shinichi MORIWAKI
- G11 - INFORMATION STORAGE
Information Patent Application
SHARED DECODER CIRCUIT AND METHOD
- Publication number 20250140294
- Publication date May 1, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd.
- XiuLi YANG
- G11 - INFORMATION STORAGE
Information Patent Application
SRAM POWER-UP RANDOM NUMBER GENERATOR
- Publication number 20250140311
- Publication date May 1, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Jui-Che Tsai
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SIGNAL SYNCHRONIZATION FOR A DISPLAY
- Publication number 20250131951
- Publication date Apr 24, 2025
- Google LLC
- Edwin Lyle Hudson
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE
- Publication number 20250131959
- Publication date Apr 24, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Cheng Hung LEE
- G11 - INFORMATION STORAGE
Information Patent Application
MODULAR MEMORY ARCHITECTURE WITH MORE SIGNIFICANT BIT SUB-ARRAY WOR...
- Publication number 20250123758
- Publication date Apr 17, 2025
- STMicroelectronics International N.V.
- Praveen Kumar VERMA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
UNIT CELL CIRCUIT AND MEMORY DEVICE INCLUDING THE SAME
- Publication number 20250124975
- Publication date Apr 17, 2025
- UIF (UNIVERSITY INDUSTRY FOUNDATION), YONSEI UNIVERSITY
- JUNG-MYUNG KANG
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY AND METHOD OF ACCESSING THE MEMORY
- Publication number 20250124976
- Publication date Apr 17, 2025
- NXP B.V.
- Jainendra Singh
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE, ASSIST CELL AND DOUBLE ASSIST CELL FOR A MEMORY DEVICE
- Publication number 20250118360
- Publication date Apr 10, 2025
- International Business Machines Corporation
- Wolfgang Penth
- G11 - INFORMATION STORAGE
Information Patent Application
PROGRAMMABLE BIT-CELL BASED DISCHARGE CELL FOR READ SELF-TIME TRACK...
- Publication number 20250111875
- Publication date Apr 3, 2025
- STMicroelectronics International N.V.
- Sant Swaroop SHRIVASTAVA
- G11 - INFORMATION STORAGE
Information Patent Application
TIMING CONTROL CIRCUIT OF MEMORY DEVICE WITH TRACKING WORD LINE AND...
- Publication number 20250104765
- Publication date Mar 27, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Xiu-Li YANG
- G11 - INFORMATION STORAGE
Information Patent Application
TIMING CONTROL CIRCUIT OF MEMORY DEVICE WITH TRACKING WORD LINE AND...
- Publication number 20250104766
- Publication date Mar 27, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Xiu-Li YANG
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE
- Publication number 20250098139
- Publication date Mar 20, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Xiu-Li YANG
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE WITH SIGNAL EDGE SHARPENER CIRCUITRY
- Publication number 20250095725
- Publication date Mar 20, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Atul KATOCH
- G11 - INFORMATION STORAGE
Information Patent Application
NOVEL PUF GENERATORS BASED ON SRAM BIT CELLS
- Publication number 20250097056
- Publication date Mar 20, 2025
- Taiwan Semiconductor Manufacturing Co., LTD
- Cormac Michael O'Connell
- G11 - INFORMATION STORAGE
Information Patent Application
LOW POWER READ CIRCUIT FOR MULTI-BANK MEMORY
- Publication number 20250078915
- Publication date Mar 6, 2025
- MEDIATEK SINGAPORE PTE LTD
- Jaswinder Singh Sidhu
- G11 - INFORMATION STORAGE
Information Patent Application
COMPUTING-IN-MEMORY CIRCUIT AND SRAM MEMORY DEVICE
- Publication number 20250069653
- Publication date Feb 27, 2025
- Institute of Microelectronics, Chinese Academy of Sciences
- Huaxiang YIN
- G11 - INFORMATION STORAGE
Information Patent Application
Circuitry for Power Management Assertion
- Publication number 20250061941
- Publication date Feb 20, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Sanjeev Kumar Jain
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR CHIP AND SEMICONDUCTOR PACKAGE INCLUDING THE SEMICOND...
- Publication number 20250056813
- Publication date Feb 13, 2025
- Samsung Electronics Co., Ltd.
- Seulji Song
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SRAM WITH FAST, CONTROLLED PEAK CURRENT, POWER EFFICIENT ARRAY RESE...
- Publication number 20250054529
- Publication date Feb 13, 2025
- STMicroelectronics International N.V.
- Praveen Kumar VERMA
- G11 - INFORMATION STORAGE
Information Patent Application
SRAM WITH FAST, CONTROLLED PEAK CURRENT, POWER EFFICIENT ARRAY RESE...
- Publication number 20250054528
- Publication date Feb 13, 2025
- STMicroelectronics International N.V.
- Praveen Kumar VERMA
- G11 - INFORMATION STORAGE
Information Patent Application
PULSE GENERATOR AND MEMORY DEVICE COMPRISING THE SAME
- Publication number 20250046366
- Publication date Feb 6, 2025
- Samsung Electronics Co., Ltd.
- Kiryong KIM
- G11 - INFORMATION STORAGE
Information Patent Application
ELECTRONIC CIRCUIT
- Publication number 20250046365
- Publication date Feb 6, 2025
- Japan Science and Technology Agency
- Satoshi Sugahara
- G11 - INFORMATION STORAGE
Information Patent Application
ELECTRONIC DEVICE FOR CONFIGURING NEURAL NETWORK
- Publication number 20250014638
- Publication date Jan 9, 2025
- Samsung Electronics Co., Ltd.
- Jinseok KIM
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SEMICONDUCTOR MEMORY DEVICES WITH FLYING BIT LINES AND METHODS OF M...
- Publication number 20250014614
- Publication date Jan 9, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Yi-Hsin Nien
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY CIRCUIT AND METHOD OF OPERATING SAME
- Publication number 20250006255
- Publication date Jan 2, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Luping KONG
- G11 - INFORMATION STORAGE

Address circuits

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

SRAM repair system and method

Memory device and manufacturing thereof

Integrated circuit die with memory macro including through-silicon...

Multi-port bitcell architecture

Multipurpose wordline underdrive circuits, devices, and systems

SRAM with improved write performance and write operation method the...

Nonvolatile SRAM

Method for reading memory

Low-power static random access memory

Selective bit line clamping control for an in-memory compute operat...

Three-dimensional (3-D) write assist scheme for memory cells

Sense amplifier circuit, memory circuit, and sensing method thereof

Method and apparatus for protecting a PUF generator

Column multiplexer circuitry

Modular memory architecture with more significant bit sub-array wor...

Timing control circuit of memory device with tracking word line and...

Memory device with signal edge sharpener circuitry

Memory device

SRAM power-up random number generator

Shared decoder circuit and method

High-speed multi-port memory supporting collision

Adaptive body bias management for an in-memory compute operation wh...

PUF generators based on SRAM bit cells

Circuitry for power management assertion

Electronic bistable circuit with third voltage to retain memory data

SRAM power savings and write assist

SRAM with fast, controlled peak current, power efficient array rese...

Shared bit lines for memory cells

Current leakage management controller for reading from memory cells

At-speed synchronous write-through operation for testing two-port m...

Patents Applicationslast 30 patents

SELECTIVE BIT LINE CLAMPING CONTROL FOR AN IN-MEMORY COMPUTE OPERAT...

Systems, Methods, and Devices for a Wordline or a Bitline Formed an...

THREE-DIMENSIONAL (3-D) WRITE ASSIST SCHEME FOR MEMORY CELLS

SENSE AMPLIFIER CIRCUIT, MEMORY CIRCUIT, AND SENSING METHOD THEREOF

SEMICONDUCTOR MEMORY DEVICE

SHARED DECODER CIRCUIT AND METHOD

SRAM POWER-UP RANDOM NUMBER GENERATOR

SIGNAL SYNCHRONIZATION FOR A DISPLAY

MEMORY DEVICE

MODULAR MEMORY ARCHITECTURE WITH MORE SIGNIFICANT BIT SUB-ARRAY WOR...

UNIT CELL CIRCUIT AND MEMORY DEVICE INCLUDING THE SAME

MEMORY AND METHOD OF ACCESSING THE MEMORY

MEMORY DEVICE, ASSIST CELL AND DOUBLE ASSIST CELL FOR A MEMORY DEVICE

PROGRAMMABLE BIT-CELL BASED DISCHARGE CELL FOR READ SELF-TIME TRACK...

TIMING CONTROL CIRCUIT OF MEMORY DEVICE WITH TRACKING WORD LINE AND...

TIMING CONTROL CIRCUIT OF MEMORY DEVICE WITH TRACKING WORD LINE AND...

MEMORY DEVICE

MEMORY DEVICE WITH SIGNAL EDGE SHARPENER CIRCUITRY

NOVEL PUF GENERATORS BASED ON SRAM BIT CELLS

LOW POWER READ CIRCUIT FOR MULTI-BANK MEMORY

COMPUTING-IN-MEMORY CIRCUIT AND SRAM MEMORY DEVICE

Circuitry for Power Management Assertion

SEMICONDUCTOR CHIP AND SEMICONDUCTOR PACKAGE INCLUDING THE SEMICOND...

SRAM WITH FAST, CONTROLLED PEAK CURRENT, POWER EFFICIENT ARRAY RESE...

SRAM WITH FAST, CONTROLLED PEAK CURRENT, POWER EFFICIENT ARRAY RESE...

PULSE GENERATOR AND MEMORY DEVICE COMPRISING THE SAME

ELECTRONIC CIRCUIT

ELECTRONIC DEVICE FOR CONFIGURING NEURAL NETWORK

SEMICONDUCTOR MEMORY DEVICES WITH FLYING BIT LINES AND METHODS OF M...

MEMORY CIRCUIT AND METHOD OF OPERATING SAME