Address generation devices Devices for accessing memories

Industry

CPC
G11C29/18

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Parent Industries

GPHYSICS G11Information storage G11CSTATIC STORES G11C29/00Checking stores for correct operation; Subsequent repair Testing stores during standby or offline operation

Current Industry

G11C29/18Address generation devices Devices for accessing memories

Industries

Patents Grantslast 30 patents

Information Patent Grant
RAM test with parity error detection and handling
- Patent number 12,130,700
- Issue date Oct 29, 2024
- Hamilton Sundstrand Corporation
- Qiuming Leng
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Semiconductor system including semiconductor device for performing...
- Patent number 12,131,791
- Issue date Oct 29, 2024
- SK Hynix Inc.
- Byung Goo Cho
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory system
- Patent number 12,068,049
- Issue date Aug 20, 2024
- Kioxia Corporation
- Naomi Takeda
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and device for generating command sequence, method and devic...
- Patent number 12,040,030
- Issue date Jul 16, 2024
- CHANGXIN MEMORY TECHNOLOGIES, INC.
- Yu Li
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus and method for detecting errors in a memory device
- Patent number 12,009,041
- Issue date Jun 11, 2024
- ARM Limited
- Siddharth Gupta
- G11 - INFORMATION STORAGE
Information Patent Grant
Command/address channel error detection
- Patent number 12,002,532
- Issue date Jun 4, 2024
- RAMBUS INC.
- John Eric Linstadt
- G11 - INFORMATION STORAGE
Information Patent Grant
Hardware accelerator device, corresponding system and method of ope...
- Patent number 11,996,158
- Issue date May 28, 2024
- STMicroelectronics S.r.l.
- Giampiero Borgonovo
- G11 - INFORMATION STORAGE
Information Patent Grant
Bit retiring to mitigate bit errors
- Patent number 11,990,200
- Issue date May 21, 2024
- Micron Technology, Inc.
- Scott E. Schaefer
- G11 - INFORMATION STORAGE
Information Patent Grant
Storage system
- Patent number 11,990,201
- Issue date May 21, 2024
- CHANGXIN MEMORY TECHNOLOGIES, INC.
- Kangling Ji
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory system and operation method of memory system
- Patent number 11,990,198
- Issue date May 21, 2024
- SK Hynix Inc.
- Chul Moon Jung
- G11 - INFORMATION STORAGE
Information Patent Grant
Programmable ECC for MRAM mixed-read scheme
- Patent number 11,972,822
- Issue date Apr 30, 2024
- SANDISK TECHNOLOGIES LLC
- Martin Hassner
- G11 - INFORMATION STORAGE
Information Patent Grant
Testing of on-chip analog-mixed signal circuits using on-chip memory
- Patent number 11,961,577
- Issue date Apr 16, 2024
- NXP USA, INC.
- Kumar Abhishek
- G11 - INFORMATION STORAGE
Information Patent Grant
Indicating a blocked repair operation
- Patent number 11,948,655
- Issue date Apr 2, 2024
- Micron Technology, Inc.
- Seth A. Eichmeyer
- G11 - INFORMATION STORAGE
Information Patent Grant
Wordline capacitance balancing
- Patent number 11,948,651
- Issue date Apr 2, 2024
- Micron Technology, Inc.
- Corrado Villa
- G11 - INFORMATION STORAGE
Information Patent Grant
Chip having debug function and chip debugging method
- Patent number 11,942,172
- Issue date Mar 26, 2024
- Realtek Semiconductor Corporation
- Pan-Ting Jiang
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory apparatus and semiconductor system including the same
- Patent number 11,942,173
- Issue date Mar 26, 2024
- SK hynix Inc.
- Heeeun Choi
- G11 - INFORMATION STORAGE
Information Patent Grant
Circuit and method to detect word-line leakage and process defects...
- Patent number 11,935,607
- Issue date Mar 19, 2024
- STMICROELECTRONICS INTERNATIONAL N.V.
- Vikas Rana
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory system
- Patent number 11,923,029
- Issue date Mar 5, 2024
- Kioxia Corporation
- Marie Takada
- G11 - INFORMATION STORAGE
Information Patent Grant
Data scrambling method that controls code density
- Patent number 11,923,000
- Issue date Mar 5, 2024
- University of Seoul Industry Cooperation Foundation
- Dong Hee Lee
- G11 - INFORMATION STORAGE
Information Patent Grant
Data storage system with intelligent error management
- Patent number 11,923,026
- Issue date Mar 5, 2024
- Seagate Technology LLC
- Jeremy B. Goolsby
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Reference voltage adjustment based on post-decoding and pre-decodin...
- Patent number 11,923,028
- Issue date Mar 5, 2024
- Chenrong Xiong
- G11 - INFORMATION STORAGE
Information Patent Grant
Apparatuses and methods for bad row mode
- Patent number 11,915,775
- Issue date Feb 27, 2024
- Micron Technology, Inc.
- Jack Riley
- G11 - INFORMATION STORAGE
Information Patent Grant
Method for memory storage and access
- Patent number 11,892,906
- Issue date Feb 6, 2024
- Infineon Technologies AG
- Thomas Kern
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Test circuit
- Patent number 11,894,087
- Issue date Feb 6, 2024
- CHANGXIN MEMORY TECHNOLOGIES, INC.
- MinNa Li
- G11 - INFORMATION STORAGE
Information Patent Grant
Method for reading and writing and memory device
- Patent number 11,894,088
- Issue date Feb 6, 2024
- CHANGXIN MEMORY TECHNOLOGIES, INC.
- Shuliang Ning
- G11 - INFORMATION STORAGE
Information Patent Grant
Systems and methods for read/write of memory devices and error corr...
- Patent number 11,881,240
- Issue date Jan 23, 2024
- CHANGXIN MEMORY TECHNOLOGIES, INC.
- Shuliang Ning
- G11 - INFORMATION STORAGE
Information Patent Grant
Self-repair for sequential SRAM
- Patent number 11,869,617
- Issue date Jan 9, 2024
- Meta Platforms Technologies, LLC
- Huichu Liu
- G11 - INFORMATION STORAGE
Information Patent Grant
Method for reading and writing and memory device
- Patent number 11,869,615
- Issue date Jan 9, 2024
- CHANGXIN MEMORY TECHNOLOGIES, INC.
- Shuliang Ning
- G11 - INFORMATION STORAGE
Information Patent Grant
Centrally logging and aggregating miscompares on chip during memory...
- Patent number 11,869,616
- Issue date Jan 9, 2024
- Cypress Semiconductor Corporation
- Senwen Kan
- G11 - INFORMATION STORAGE
Information Patent Grant
Storage devices and methods of operating storage devices
- Patent number 11,862,273
- Issue date Jan 2, 2024
- Samsung Electronics Co., Ltd.
- Sehwan Park
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
APPRATUS AND METHOD FOR CHANGING A READ VOLTAGE APPLIED FOR READING...
- Publication number 20240355405
- Publication date Oct 24, 2024
- SK HYNIX INC.
- Jae Yong SON
- G11 - INFORMATION STORAGE
Information Patent Application
COMMAND/ADDRESS CHANNEL ERROR DETECTION
- Publication number 20240355407
- Publication date Oct 24, 2024
- Rambus Inc.
- John Eric Linstadt
- G11 - INFORMATION STORAGE
Information Patent Application
STORAGE DEVICE USING HOST MEMORY BUFFER AND METHOD OF OPERATING THE...
- Publication number 20240338124
- Publication date Oct 10, 2024
- Samsung Electronics Co., Ltd.
- Jongmin KIM
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
STORAGE DEVICE FOR SUPPORTING DYNAMIC ALLOCATION OF MEMORY AND METH...
- Publication number 20240331790
- Publication date Oct 3, 2024
- SK HYNIX INC.
- Tae Ho LIM
- G11 - INFORMATION STORAGE
Information Patent Application
APPARATUSES AND METHODS FOR TESTING MEMORY DEVICES
- Publication number 20240331794
- Publication date Oct 3, 2024
- Micron Technology, Inc.
- TAKAMASA SUZUKI
- G11 - INFORMATION STORAGE
Information Patent Application
APPARATUSES, SYSTEMS, AND METHODS FOR STORING ERROR INFORMATION AND...
- Publication number 20240312547
- Publication date Sep 19, 2024
- Micron Technology, Inc.
- Sujeet Ayyapureddi
- G11 - INFORMATION STORAGE
Information Patent Application
RAM TEST WITH PARITY ERROR DETECTION AND HANDLING
- Publication number 20240296087
- Publication date Sep 5, 2024
- HAMILTON SUNDSTRAND CORPORATION
- Qiuming Leng
- G11 - INFORMATION STORAGE
Information Patent Application
BIT RETIRING TO MITIGATE BIT ERRORS
- Publication number 20240265991
- Publication date Aug 8, 2024
- Micron Technology, Inc.
- Scott E. Schaefer
- G11 - INFORMATION STORAGE
Information Patent Application
COMMAND ADDRESS CONTROL CIRCUIT, AND SEMICONDUCTOR APPARATUS AND SE...
- Publication number 20240257891
- Publication date Aug 1, 2024
- SK HYNIX INC.
- Ji Hwan PARK
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY SYSTEM AND OPERATION METHOD OF MEMORY SYSTEM
- Publication number 20240257894
- Publication date Aug 1, 2024
- SK HYNIX INC.
- Chul Moon JUNG
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE INCLUDING REPAIR CIRCUIT AND OPERATING METHOD THEREOF
- Publication number 20240257896
- Publication date Aug 1, 2024
- Samsung Electronics Co., Ltd.
- Seungki HONG
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY SYSTEM AND OPERATION METHOD OF MEMORY SYSTEM
- Publication number 20240257895
- Publication date Aug 1, 2024
- SK HYNIX INC.
- Chul Moon JUNG
- G11 - INFORMATION STORAGE
Information Patent Application
TEST CIRCUIT AND RECEIVING CIRCUIT HAVING TEST FUNCTION
- Publication number 20240242773
- Publication date Jul 18, 2024
- SK HYNIX INC.
- Gi Moon HONG
- G11 - INFORMATION STORAGE
Information Patent Application
Logical Memory Repair with a Shared Physical Memory
- Publication number 20240203517
- Publication date Jun 20, 2024
- Google LLC
- Wilson Pradeep
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY APPARATUS AND SEMICONDUCTOR SYSTEM INCLUDING THE SAME
- Publication number 20240194285
- Publication date Jun 13, 2024
- SK HYNIX INC.
- HEEEUN CHOI
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR DEVICE AND METHOD OF TESTING THE SEMICONDUCTOR DEVICE
- Publication number 20240177791
- Publication date May 30, 2024
- SK HYNIX INC.
- Jun Hyuk LEE
- G11 - INFORMATION STORAGE
Information Patent Application
METHOD FOR OPERATING A MEMORY DEVICE AND MEMORY DEVICE THEREOF
- Publication number 20240170086
- Publication date May 23, 2024
- PUFsecurity Corporation
- CHI-YI SHAO
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY BIST CIRCUIT AND METHOD
- Publication number 20240170083
- Publication date May 23, 2024
- TEXAS INSTRUMENTS INCORPORATED
- Devanathan Varadarajan
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICES AND ELECTRONIC DEVICES OUTPUTING EVENT DATA RELATED...
- Publication number 20240161850
- Publication date May 16, 2024
- Samsung Electronics Co., Ltd.
- Byeongho Kim
- G11 - INFORMATION STORAGE
Information Patent Application
TEST SYSTEMS CONFIGURED TO PERFORM TEST MODE OPERATIONS FOR MULTIPL...
- Publication number 20240161851
- Publication date May 16, 2024
- SK HYNIX INC.
- Sang Ah HYUN
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR MEMORY DEVICE AND MEMORY SYSTEM PERFORMING ERROR CORR...
- Publication number 20240161853
- Publication date May 16, 2024
- SK HYNIX INC.
- Hong Ki MOON
- G11 - INFORMATION STORAGE
Information Patent Application
METHOD FOR MEMORY STORAGE AND ACCESS
- Publication number 20240126640
- Publication date Apr 18, 2024
- INFINEON TECHNOLOGIES AG
- Thomas Kern
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TEST CIRCUIT AND SEMICONDUCTOR APPARATUS INCLUDING THE SAME
- Publication number 20240120014
- Publication date Apr 11, 2024
- SK HYNIX INC.
- Suk Hwan CHOI
- G11 - INFORMATION STORAGE
Information Patent Application
BUILT-IN SELF-TEST CIRCUIT FOR ROW HAMMERING IN MEMORY
- Publication number 20240096435
- Publication date Mar 21, 2024
- Synopsys, Inc.
- Grigor TSHAGHARYAN
- G11 - INFORMATION STORAGE
Information Patent Application
ERROR REMAPPING
- Publication number 20240096434
- Publication date Mar 21, 2024
- Rambus Inc.
- Christopher HAYWOOD
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY TEST CIRCUIT, MEMORY CHIP, AND TESTING METHOD OF MEMORY CHIP
- Publication number 20240079075
- Publication date Mar 7, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Jui-Jen Wu
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR SYSTEM INCLUDING SEMICONDUCTOR DEVICE FOR PERFORMING...
- Publication number 20240079077
- Publication date Mar 7, 2024
- SK HYNIX INC.
- Byung Goo CHO
- G11 - INFORMATION STORAGE
Information Patent Application
Dynamic Address Scramble
- Publication number 20240071464
- Publication date Feb 29, 2024
- Micron Technology, Inc.
- Erik T. Barmon
- G11 - INFORMATION STORAGE
Information Patent Application
MACHINE LEARNING ASSISTED READ VERIFY IN A MEMORY SUB-SYSTEM
- Publication number 20240062841
- Publication date Feb 22, 2024
- Micron Technology, Inc.
- Amit Bhardwaj
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TESTING OF ON-CHIP ANALOG-MIXED SIGNAL CIRCUITS USING ON-CHIP MEMORY
- Publication number 20240013848
- Publication date Jan 11, 2024
- NXP USA, Inc.
- Kumar Abhishek
- G11 - INFORMATION STORAGE

Address generation devices Devices for accessing memories

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

RAM test with parity error detection and handling

Semiconductor system including semiconductor device for performing...

Memory system

Method and device for generating command sequence, method and devic...

Apparatus and method for detecting errors in a memory device

Command/address channel error detection

Hardware accelerator device, corresponding system and method of ope...

Bit retiring to mitigate bit errors

Storage system

Memory system and operation method of memory system

Programmable ECC for MRAM mixed-read scheme

Testing of on-chip analog-mixed signal circuits using on-chip memory

Indicating a blocked repair operation

Wordline capacitance balancing

Chip having debug function and chip debugging method

Memory apparatus and semiconductor system including the same

Circuit and method to detect word-line leakage and process defects...

Memory system

Data scrambling method that controls code density

Data storage system with intelligent error management

Reference voltage adjustment based on post-decoding and pre-decodin...

Apparatuses and methods for bad row mode

Method for memory storage and access

Test circuit

Method for reading and writing and memory device

Systems and methods for read/write of memory devices and error corr...

Self-repair for sequential SRAM

Method for reading and writing and memory device

Centrally logging and aggregating miscompares on chip during memory...

Storage devices and methods of operating storage devices

Patents Applicationslast 30 patents

APPRATUS AND METHOD FOR CHANGING A READ VOLTAGE APPLIED FOR READING...

COMMAND/ADDRESS CHANNEL ERROR DETECTION

STORAGE DEVICE USING HOST MEMORY BUFFER AND METHOD OF OPERATING THE...

STORAGE DEVICE FOR SUPPORTING DYNAMIC ALLOCATION OF MEMORY AND METH...

APPARATUSES AND METHODS FOR TESTING MEMORY DEVICES

APPARATUSES, SYSTEMS, AND METHODS FOR STORING ERROR INFORMATION AND...

RAM TEST WITH PARITY ERROR DETECTION AND HANDLING

BIT RETIRING TO MITIGATE BIT ERRORS

COMMAND ADDRESS CONTROL CIRCUIT, AND SEMICONDUCTOR APPARATUS AND SE...

MEMORY SYSTEM AND OPERATION METHOD OF MEMORY SYSTEM

MEMORY DEVICE INCLUDING REPAIR CIRCUIT AND OPERATING METHOD THEREOF

MEMORY SYSTEM AND OPERATION METHOD OF MEMORY SYSTEM

TEST CIRCUIT AND RECEIVING CIRCUIT HAVING TEST FUNCTION

Logical Memory Repair with a Shared Physical Memory

MEMORY APPARATUS AND SEMICONDUCTOR SYSTEM INCLUDING THE SAME

SEMICONDUCTOR DEVICE AND METHOD OF TESTING THE SEMICONDUCTOR DEVICE

METHOD FOR OPERATING A MEMORY DEVICE AND MEMORY DEVICE THEREOF

MEMORY BIST CIRCUIT AND METHOD

MEMORY DEVICES AND ELECTRONIC DEVICES OUTPUTING EVENT DATA RELATED...

TEST SYSTEMS CONFIGURED TO PERFORM TEST MODE OPERATIONS FOR MULTIPL...

SEMICONDUCTOR MEMORY DEVICE AND MEMORY SYSTEM PERFORMING ERROR CORR...

METHOD FOR MEMORY STORAGE AND ACCESS

TEST CIRCUIT AND SEMICONDUCTOR APPARATUS INCLUDING THE SAME

BUILT-IN SELF-TEST CIRCUIT FOR ROW HAMMERING IN MEMORY

ERROR REMAPPING

MEMORY TEST CIRCUIT, MEMORY CHIP, AND TESTING METHOD OF MEMORY CHIP

SEMICONDUCTOR SYSTEM INCLUDING SEMICONDUCTOR DEVICE FOR PERFORMING...

Dynamic Address Scramble

MACHINE LEARNING ASSISTED READ VERIFY IN A MEMORY SUB-SYSTEM

TESTING OF ON-CHIP ANALOG-MIXED SIGNAL CIRCUITS USING ON-CHIP MEMORY